Rambus Inc. v. Infineon Technologies AG

318 F.3d 1081
CourtCourt of Appeals for the Federal Circuit
DecidedJanuary 29, 2003
DocketNos. 01-1449, 01-1583, 01-1604, 01-1641, 02-1174 and 02-1192
StatusPublished
Cited by18 cases

This text of 318 F.3d 1081 (Rambus Inc. v. Infineon Technologies AG) is published on Counsel Stack Legal Research, covering Court of Appeals for the Federal Circuit primary law. Counsel Stack provides free access to over 12 million legal documents including statutes, case law, regulations, and constitutions.

Bluebook
Rambus Inc. v. Infineon Technologies AG, 318 F.3d 1081 (Fed. Cir. 2003).

Opinions

Opinion for the court filed by Circuit Judge RADER. Dissenting opinion filed by Circuit Judge PROST.

RADER, Circuit Judge.

During trial, the United States District Court for the Eastern District of Virginia granted judgment as a matter of law (JMOL) and held that Infineon Technologies AG, Infineon Technologies North America Corp., and Infineon Technologies Holding North America Inc. (collectively Infineon) did not infringe Rambus Inc.’s patents. The jury later found Rambus liable for fraud associated with standard-setting activities on two computer memory technologies. On post-trial JMOL motions, the district court set aside a verdict of fraud on one of the memory technologies, but permitted the fraud verdict to stand on the other technology. The court then issued an injunction against Rambus and awarded Infineon attorney fees.

Because the district court erred in its claim construction, this court vacates the grant of JMOL of noninfringement and remands for consideration under the revised claim construction. Additionally, because substantial evidence does not support the implicit jury finding that Rambus breached the relevant disclosure duty during its participation in the standards committee, this court reverses the denial of JMOL that let the fraud verdict stand. Based on the record evidence, the district court properly set aside the fraud verdict on the remaining technology. These holdings render the injunction moot and require this court to vacate and remand the attorney fees award for reconsideration in light of this opinion. The record evidence supports the district court’s grant of JMOL Accordingly, this court vacates-in-part, reverses-in-part, affirms-in-part, and remands.

I.

Rambus develops and licenses memory technologies to companies that manufacture semiconductor memory devices. Rambus does not manufacture any memory devices itself, but relies instead on licensing its patent portfolio for revenue. In April 1990, Rambus filed U.S. Patent Application Serial No. 07/510,898 (’898 application) with claims directed to a computer memory technology known as dynamic random access memory (DRAM). The United States Patent and Trademark Office (PTO) determined that the '898 application covered multiple independent inventions. The PTO issued an eleven-way restriction requirement requiring Rambus to elect one invention to pursue in the '898 application. In response, Rambus filed numerous divisional and continuation applications based on the original '898 application — at least thirty-one of which have issued. Many of these patents claim aspects of a memory technology known as Rambus DRAM (RDRAM). In April [1085]*10851991, Rambus filed a patent application under the Patent Cooperation Treaty (WIPO application) claiming priority to the '898 application.

In December 1991, Rambus attended a Joint Electron Devices Engineering Council (JEDEC) meeting as a guest. Rambus officially joined JEDEC in February 1992. JEDEC is a standard-setting body associated with the Electronic Industries Association (EIA).1 JEDEC member companies participate on various committees to develop standards for semiconductor technologies. Committee JC-42.3 drafts standards for random access memory (RAM), a common component in computers, printers, and other electronic devices. JEDEC meetings are open meetings, but nonmembers must receive an invitation to attend. Minutes of the JEDEC meetings and copies of the published JEDEC standards are available to members and nonmembers alike. Both JEDEC and EIA have a written patent policy encouraging the adoption of standards free of patented items or processes. At least by 1993, the EIA/JE-DEC patent policy required members to disclose patents and patent applications “related to” the standardization work of the committees.

During Rambus’s membership on committee JC-42.3, JEDEC adopted a standard for synchronous dynamic random access memory (SDRAM). SDRAM increases the speed at which a central processing unit (CPU) can read or write memory by synchronizing itself with the CPU’s clock speed. JEDEC incorporated four technologies into its SDRAM standard that are relevant to this case: programmable CAS latency, programmable burst length, externally supplied reference voltage, and two-bank designs. JEDEC adopted and published its SDRAM standard in early 1993. Since 1993, JEDEC has published several revisions of the standard.

Rambus attended its last JEDEC meeting in December 1995, and officially withdrew from JEDEC in June 1996. In December 1996, JEDEC began work on a standard for double data rate-SDRAM (DDR-SDRAM), the successor to SDRAM. DDR-SDRAM doubles the transfer rate between the CPU and memory device by supporting data transfers on both the rising and falling edge of each clock cycle. The JEDEC DDR-SDRAM standard ultimately incorporated four technologies that had been discussed in general before Rambus’s withdrawal in 1996. Those technologies include: source-synchronous clocking, low-voltage swing signaling, dual clock edge, and on-chip phase locked loop/delay locked loop (PLL/DLL). JEDEC adopted and published the DDR-SDRAM standard in 2000.

In September 1993, Rambus disclosed its first issued RDRAM patent, U.S. Patent No. 5,243,703 (’703 patent), a divisional of the '898 application, to JEDEC during a committee meeting. ■ As a divisional, .the written description of the '703 .patent is substantially identical to that of the '898 application. At that same meeting, another JEDEC member also disclosed Ram-bus’s WIPO application to the committee. Rambus did not disclose any patent applications to JEDEC.

After leaving JEDEC Rambus filed more divisional and continuation applications based on the '898 application. Four of the patents that issued from those applications are at issue in the present case, namely U.S. Patent Nos. 5,954,804 ('804 [1086]*1086patent), 5,953,263 (’263 patent), 6,034,918 ('918 patent), and 6,032,214 (’214 patent). Rambus filed the applications that ripened into these four patents between February 1997 and February 1999. Again, the written description of each of these patents is substantially identical to that of the '703 patent and the '898 application. The first of these four patents issued in 1999.

In late 2000, Rambus sued Infineon, a manufacturer of semiconductor memory devices (including SDRAM and DDR-SDRAM) and a member of JEDEC, for infringement of the patents-in-suit. Ram-bus alleged infringement of fifty-seven claims in the four patents. Infineon counterclaimed for fraud under Virginia state law. Infineon alleged that Rambus committed fraud by not disclosing to JEDEC its patents and patent applications “related to” the SDRAM and DDR-SDRAM standards. After construing the claims, the district court granted JMOL of nonin-fringement in favor of Infineon under Rule 50(a) of the Federal Rules of Civil Procedure. Fed.R.Civ.P. 50(a); Rambus, Inc. v. Infineon Techs. AG, No. 3:00CV524, slip op. at 1-2 (E.D.Va. May 2, 2001); Rambus, Inc. v. Infineon Techs. AG, No. 3:00cv524, slip op. at 1-2 (E.D.Va. May 30, 2001). Infineon’s fraud counterclaims were tried to a jury. The jury found that Rambus committed fraud during SDRAM and DDR-SDRAM standardization. Rambus moved for JMOL of no fraud on both the SDRAM and DDR-SDRAM verdicts. Alternatively, Rambus requested a new trial. The district court denied JMOL on the SDRAM fraud verdict.

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318 F.3d 1081, Counsel Stack Legal Research, https://law.counselstack.com/opinion/rambus-inc-v-infineon-technologies-ag-cafc-2003.