Semitool, Inc. v. Novellus Sys., Inc.

12 F. App'x 918
CourtCourt of Appeals for the Federal Circuit
DecidedJune 8, 2001
DocketNo. 00-1375
StatusPublished

This text of 12 F. App'x 918 (Semitool, Inc. v. Novellus Sys., Inc.) is published on Counsel Stack Legal Research, covering Court of Appeals for the Federal Circuit primary law. Counsel Stack provides free access to over 12 million legal documents including statutes, case law, regulations, and constitutions.

Bluebook
Semitool, Inc. v. Novellus Sys., Inc., 12 F. App'x 918 (Fed. Cir. 2001).

Opinion

DECISION

LOURIE, Circuit Judge.

Semitool, Inc. appeals from the decision of the United States District Court for the Northern District of California granting Novellus Systems, Inc.’s motion for summary judgment that Novellus’s SABRE and SABRE xT semiconductor wafer processing devices do not infringe Semitool’s U.S. Patents 5,222,310 and 5,337,708. Semitool, Inc. v. Novellus Sys., No. C-98-3089 (N.D.Cal. May 10, 2000). Because the district court did not err in granting summary judgment of noninfringement, we affirm.

DISCUSSION

A. Background

Semitool is the assignee of the ’310 and ’708 patents, which relate to an automated semiconductor wafer processing tool in which various chemical and electrochemical processes can be performed on a single wafer. Semitool, Inc. v. Novellus Sys., No. C-98-3089, slip op. at 2 (N.D.Cal. Mar. 17, 2000) (order) (“Semitool II”). Wafer processing generally refers to the application of chemical substances to a silicon substrate to alter its surface properties. Typically, the surface of a semiconductor wafer is first oxidized to create an insulated layer of silicon dioxide. Id. Next, an etchant-resistant coating is applied to the surface of the wafer. A chemical etchant is then applied to the wafer to remove portions of the wafer not protected by the etchant-resistant coating, leaving a patterned layer of exposed silicon. Id. Finally, the exposed silicon layer is doped with another chemical substance that affects [921]*921the electrical characteristics of the silicon, which enables thin layers of a conducting metal to be electrochemically deposited (a process known as “plating”) to establish electrical connections between various areas of the semiconductor. Id. These interconnections allow various transistors and other microelectronic devices located on the semiconductor to operate together, forming an integrated circuit. Although the claims of the patents at issue are not limited to any particular semiconductor processing operation, both patents principally focus on the chemical etching phase of wafer processing.

The wafer processing tool claimed in the ’310 and ’708 patents primarily comprises a movable head that is capable of “mating” with a processing bowl, which contains the chemical etchant used in processing the wafer. Id. at 3. The ’310 patent contemplates the use of both liquid and gas chemical etchants, see, e.g., ’310 patent, col. 7, II. 3-42, while the ’708 patent focuses exclusively on the use of the vapor phase of processing chemicals (particularly aqueous hydrofluoric acid), see, e.g., ’708 patent, col. 3, I. 49 to col. 4, I. 6. The movable head contains a structure for holding the wafer (the “wafer support” in the ’708 patent) such that the wafer to be processed is positioned facing downward towards the bowl. Semitool II at 3. The processing device also has a pneumatic cylinder, which is used to raise and lower the processing head over the processing bowl such that wafers may be inserted and removed after processing. Id. at 4. The entire processing unit, consisting of the head, the bowl, and the pneumatic cylinder,, is mounted inside a cabinet, which is designed to prevent contaminants from adversely affecting processing. Id.

Claims 1 and 3-5 of the ’310 patent and claims 25, 32-37, 50, 55, and 56 of the ’708 patent are at issue on appeal. Claim 1 of the ’310 patent, which is representative of the claims of that patent and contains two limitations relevant to this appeal, reads as follows:

1. A wafer processing apparatus, comprising:
a stationary frame;
at least one processing base and a complementary processing head mounted to the frame, the processing base and complementary processing head being moveable relative to one another between a closed relative position forming a substantially closed processing space for containing processing fluids between the processing base and the processing head and an open relative position allowing transfer of wafers to and from the processing head;
means for moving the processing base and complementary processing head relative to one another; and wafer transfer means on the frame for directing individual wafers between the processing head and one or more wafer carriers.

’310 patent, col. 10, II. 10-27 (emphasis added). The ’708 patent, which is a continuation-in-part of the application from which the ’310 patent issued, is similar to the ’310 patent.1 However, the claims of the ’708 patent do not contain the “complementary processing head” limitation, and [922]*922include an additional limitation relevant to this appeal. That limitation reads as follows:

[A]t least one wafer support for detach-ably supporting wafers thereon; said at least one wafer support allowing controlled motion of the wafer support and any wafer held therein, at least when the processing head is in said at least one processing position[.]

’708 patent, col. 27, II. 63-68 (emphasis added).

Novellus manufactures and sells two wafer processing tools, the SABRE and the SABRE xT systems (collectively, “the SABRE systems”). Semitool II at 11. Both machines perform the electrochemical deposition or plating processing step, in which a thin film of pure copper metal is applied onto the wafers during the manufacture of integrated circuits. Id. The electrochemical deposition occurs in a plating cell (characterized by Semitool as the “bowl”), which is comprised of a splash shield, an anode chamber, an exhaust tube inlet, and three concentric plating tanks. Id. The silicon wafers to be plated are held by a “clamshell” (characterized by Semi-tool as the “wafer support” in the ’708 patent), which is attached by a shaft to a drive assembly (characterized by Semitool as the “head”). Id. The clamshell and the drive assembly are moved up and down over the plating cell to facilitate the loading and unloading of the silicon wafers to be processed. Id. Wafers are loaded into the plating cell through a “mail slot” on the side of the splash shield. Id. at 11-12. After loading, the clamshell and drive assembly are lowered into a closed position until the wafer to be plated comes into contact with the liquid plating solution in the inner plating tank. Id. at 12. The drive assembly then spins the clamshell and wafer together at the surface of the plating solution. Id. Plating occurs when an electrical current travels through the plating solution and the wafer, thereby depositing copper ions in the plating solution onto the surface of the wafer in the form of pure copper metal. Id.

When the SABRE systems are in the closed position, there is no direct contact between the outer wall of the drive assembly and the interior walls of the plating cell. Id. Instead, an annular gap exists between the outer wall of the drive assembly and the interior wall of the plating cell, which is 0.25 inches wide in the SABRE machine and 0.815 inches wide in the SABRE xT machine. Id. Furthermore, the mail slot remains open throughout the plating process. The combined area of the annular gap and the mail slot opening amounts to 19.2 square inches in the SABRE machine and 38.6 square inches in the SABRE xT machine. Id. at 13.

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12 F. App'x 918, Counsel Stack Legal Research, https://law.counselstack.com/opinion/semitool-inc-v-novellus-sys-inc-cafc-2001.