Hamilcar Barca IP LLC v. NVIDIA CORP.

CourtDistrict Court, W.D. Texas
DecidedApril 30, 2026
Docket1:25-cv-00620
StatusUnknown

This text of Hamilcar Barca IP LLC v. NVIDIA CORP. (Hamilcar Barca IP LLC v. NVIDIA CORP.) is published on Counsel Stack Legal Research, covering District Court, W.D. Texas primary law. Counsel Stack provides free access to over 12 million legal documents including statutes, case law, regulations, and constitutions.

Bluebook
Hamilcar Barca IP LLC v. NVIDIA CORP., (W.D. Tex. 2026).

Opinion

UNITED STATES DISTRICT COURT WESTERN DISTRICT OF TEXAS AUSTIN DIVISION

HAMILCAR BARCA IP LLC, § Plaintiff § § v. § No. 1:25-CV-00620-RP § NVIDIA CORP., § Defendant §

ORDER

The District Judge referred the Markman1 hearing in this case to the undersigned. Dkt. 39. After considering the relevant law, the parties’ briefing, and the arguments presented at the hearing, the Court will construe the claims according to the following discussion. I. BACKGROUND This patent-infringement suit arises from Defendant Nvidia Corp.’s (“Nvidia”) allegedly unlawful use, sale, and offers to sell Plaintiff Hamilcar Barca IP LLC’s (“Hamilcar”) patented technology related to error feedback in a Serial Advanced Technology Attachment (“SATA”) and switching security states in a computer processor. Dkt. 1. Hamilcar alleges infringement of two patents, which the Court describes below.

1 Markman v. Westview Instruments, Inc., 517 U.S. 370, 391 (1996) (holding that interpretation of a word in a patent is an issue of law to be decided by the judge). A. The 8,086,938 (“’938”) Patent Computer interfaces need pre-defined protocols allowing components (i.e., the computer and a storage device) to communicate. ’938 Patent, 1:23-25.

Electromagnetic interference or “noise” can interfere with those communications. Id. at 2:24-37. At the time of the patent, companies were using SATA to organize communications into packets called Frame Information Structures (“FIS”). Id. at 1:20-26, 2:16-23. There are two different types of FIS: data and non-data. Id. at 2:19- 23; 2:17-20. A data type contains data; a non-data type can include information like commands from the computer to the storage device. Id. at 2:17-23.

According to the ’938 Patent, pre-invention SATA protocol provided that when a non-data FIS was received with an error, the receiving side would request that it be resent. Id. at 2:24-30. But when a data FIS was received with an error, the protocol did not require that the data FIS be resent. Id. at 2:29-34. This resulted in “abnormal” control commands being passed between the computer parts. Id. at 2:38-44. The ’938 patent aims to fix that problem. It detects errors in the transmission of a data FIS and, when such errors are detected, sets a “check bit” in the AT

Attachment with Packet Interface (“ATAPI”) status register. Id. at 4:53-64. This signals there is an error and allows other components to handle it. See id. at 4:53-5:8. Independent claim 1 states, A method for processing noise interference in a data accessing device with a SATA (Serial Advanced Technology Attachment) interface, the method comprising:

an error detecting step for detecting whether there is a CRC (Cyclic Redundancy Check) error, whether an reception error primitive (R_ERR primitive) is received, whether an improper primitive is received, or whether a LINK layer error is detected, and repeating this step if there is no any error;

a type detecting step for detecting whether an FIS (Frame Information Structure) is a data type FIS;

a responding step for asserting the CHECK bit of the ATAPI Status Register when the FIS is data type; and

sending back the response.

’938 Patent, 6:39-49.

B. The 8,407,783 (“’783”) Patent Before the ’783 Patent, computer processors could switch between two security states (high security and normal security), with each security state having its own dedicated hardware resources isolated from the other security state. See ’783 Patent, 1:17-28. The ’783 Patent purports to make this more efficient by sharing hardware resources. Id. at 1:45-56. Specifically, when a program requests access to hardware resources, the processor assigns a “user access right” to the request based on the system’s security state and “protection level.” Id. at 1:65-2:10. Because some hardware resources may be available in both security states, this increases utilization. Id. at 3:32-44. Requests made in the high-security state receive greater or equal access to hardware resources than requests made in the normal security state, so sensitive data are protected from potentially malicious software in the normal security state. Id. Claim 3 of the ’783 Patent discloses The computing system as claimed in claim 2, wherein the processor core initializes the protection level register during a security booting procedure of the computing system, and the processor core is in the security state during the security booting procedure. ’783 Patent, 7:12-16. Similarly, claim 12 discloses The method as claimed in claim 11, wherein the protection level is initialized by the processor core during a security booting procedure of the computing system, and the processor core is in the security state during the security booting procedure. Id. at 8:25-29. The ’783 Patent method claim (claim 11) states A method of providing normal security and high security services with reduced amount of hardware resources, comprising:

providing hardware resources which are grouped into a plurality of resource security levels;

providing a processor core switched between different security states, the different security states including a normal security state for providing the normal security services and a high security state for providing the high security services;

assigning a user access right to a request in accordance with the security state of the processor core and a protection level of a computing system including the hardware resources and the processor core, wherein, in comparison with the normal security state, the user access right assigned in the high security state for a particular protection level of the computing system further allows the request to use the hardware resources of a higher resource security level, and, for a particular security state of the processor core, the user access right assigned for a lower protection level covers the user access right assigned for a higher protection level;

determining whether the request has the authority to use the hardware resources in accordance with the assigned user access right and the resource security levels of required hardware resources of the request;

executing the request when the request is determined to have the authority to use the hardware resources; and responding the request with an exception when the request is determined to not have the authority to use the hardware resources.

’783 Patent, 7:61-8:25.

II. LEGAL STANDARDS A. Claim Construction “‘[T]he claims of a patent define the invention to which the patentee is entitled the right to exclude.’” Phillips v. AWH Corp., 415 F.3d 1303, 1312 (Fed. Cir. 2005) (en banc) (quoting Innova/Pure Water Inc. v. Safari Water Filtration Sys., Inc., 381 F.3d 1111, 1115 (Fed. Cir. 2004)). In determining the meaning of the claims, courts first consider intrinsic evidence, including the claims themselves, the specification, and the prosecution history. Id. at 1313; C.R. Bard, Inc. v. U.S. Surgical Corp., 388 F.3d 858, 861 (Fed. Cir. 2004). “The claim construction inquiry … begins and ends in all cases with the actual words of the claim.” Renishaw PLC v. Marposs Societa’ per Azioni, 158 F.3d 1243, 1248 (Fed. Cir. 1998).

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Hamilcar Barca IP LLC v. NVIDIA CORP., Counsel Stack Legal Research, https://law.counselstack.com/opinion/hamilcar-barca-ip-llc-v-nvidia-corp-txwd-2026.