Cascades Computer Innovation, LLC v. Samsung Electronics Co.

77 F. Supp. 3d 756, 2015 WL 94117
CourtDistrict Court, N.D. Illinois
DecidedFebruary 18, 2015
DocketNo. 11 C 4574; No. 11 C 6235
StatusPublished
Cited by4 cases

This text of 77 F. Supp. 3d 756 (Cascades Computer Innovation, LLC v. Samsung Electronics Co.) is published on Counsel Stack Legal Research, covering District Court, N.D. Illinois primary law. Counsel Stack provides free access to over 12 million legal documents including statutes, case law, regulations, and constitutions.

Bluebook
Cascades Computer Innovation, LLC v. Samsung Electronics Co., 77 F. Supp. 3d 756, 2015 WL 94117 (N.D. Ill. 2015).

Opinion

MEMORANDUM OPINION AND ORDER

MATTHEW F. KENNELLY, District Judge:

Cascades Computer Innovation, LLC, has sued Samsung Electronics Co. Ltd. (Samsung) and HTC Corporation (HTC) for patent infringement, contending that the defendants manufacture and sell products that infringe U.S. patent number 7,065,750 (the ’750 patent). On September 14, 2014, the Court granted summary judgment in part, concluding that the defendants were entitled to summary judgment of noninfringement from January 29, 2014, the date of Cascades’ settlement and license agreement with Google, forward. Cascades Computer Innovation, LLC v. Samsung Elecs. Co. & HTC Corp., Nos. 11 C 4574 & 11 C 6235, 70 F.Supp.3d 863, 869-70, 2014 WL 4553226, at *5 (N.D.Ill. Sept. 14, 2014). On September 24, 2014, Samsung and HTC jointly moved for summary judgment of noninfringement for the time preceding January 29, 2014.

Background

Because defendants have moved for summary judgment, the Court construes all facts in the light most favorable to Cascades, the nonmoving party. Anderson v. Liberty Lobby, Inc., 477 U.S. 242, 255, 106 S.Ct. 2505, 91 L.Ed.2d 202 (1986).

Cascades is the exclusive licensee of the ’750 patent, entitled “Method and Apparatus for Preserving Precise Exceptions in Binary Translated Code.” PL’s Niro Deck, Ex. T. As a general overview, the ’750 patent describes a method and apparatus for efficiently executing on one system architecture computer programming code that is intended for a different architecture. According to the patent specification, “the task of porting [a] software application to a new platform, based on a different architectural design, is very complex and time consuming.” Id. at 1:42-51. Binary translation, a technique in which “foreign code is processed by host software to produce new host code corresponding to the foreign code,” is one mechanism for executing foreign code in a host environment. Id. at 2:1-10, 4:15-17. The patented invention “provides a system and method for executing binary translated [760]*760code in a manner that exploits the explicit parallelism of a host computer system and that supports precise exception maintenance.” Id. at 3:56-59.

One challenge with binary translation is that software programs may include errors that “mak[e] it difficult to accurately execute the foreign code in the host environment.” Id. at 2:12-13. An exception is one type of error. “An exception is a problem or a change in conditions that causes the processor or computer system to stop or suspend execution of the program and respond to the problem in a separate routine, which is often referred to as an exception handler.” Id. at 2:22-26. An exception occurs when a program that is running encounters a condition “that violates a mathematical or logical rule or attempts to access invalid memory or data.” Id. at 2:16- 18. For example, an exception arises when the denominator is zero and a divide instruction is executed. Id. at 2:37-39.

The’ patent discloses a mechanism by which exceptions are handled more efficiently. As the specification explains, the “exception handler in the host architecture maintains documentation showing which registers must be used to restore the original foreign register content.” Id. at 4:67-5:3. “Thus, when an operation generates an exception, the exception handler quickly determines the state of the computer system prior to detection of the exception. Using this information, the exception handler determines an appropriate solution to the problem.” Id. at 5:10-15.

Examples from the specification illustrate how this process works. A host central processing unit (CPU) “ternporarily preserves register data and system status information before executing instructions that will calculate a variable.” Id. at 10:9-12. With that information, “the exception handler can determine the state of the computer system immediately prior to the detection of the exception because the present invention preserves the data and conditions that gave rise to the exception.” Id. at 10:20-23. Put differently, when an exception occurs, the exception handler uses the documentation created during the optimizing binary translation “to recreate the state of the host computer system at the most recently executed recovery point.” Id. at 15:22- 27. The availability of prior system state information minimizes the number of side effects that must be investigated. Id. at 5:16-19.

At issue in this case are two of the ’750 patent’s eighteen claims. Claim 1 describes the invention’s binary translation system, comprising the following six elements:

a non-optimizing foreign code execution module configured to maintain dedicated foreign state for each foreign binary operation executed allowing for the exceptions arisen to be handled precisely; and
an optimizing binary translator configured to translate foreign binary operations into optimized sequences of host operations in such a way as to improve the speed of execution of the sequences; and
a host CPU configured to execute the host operations; and
a documentation generator configured to generate a set of documentations for optimized sequences of host operations, wherein each documentation describes operations required to calculate a corresponding foreign state for an appointed point;
a documentation tracker configured to record host operation addresses at appointed points of the host operation sequences being executed, wherein, for each host operation address, operations required to calculate a corresponding foreign state for the host [761]*761operation address are added to documentation; and
a recovery mechanism configured to select a documentation in the set of documentations using a host operation address corresponding to the selected documentation, wherein the recovery mechanism is configured to perform the operations saved in the documentation to calculate the corresponding foreign state for the host operation address and to continue foreign codes execution in case of the exception arisen during the execution of the corresponding optimized host codes.

Id. at 16:5-84. Claim 15 describes a “method of recomputing a dedicated foreign state in a binary translation system from documentation generated by an optimizing translator in a case of an exception arising during execution of optimized binary translated code translated from a foreign code,” comprising three elements:

designating a set of recovery points in the optimized binary translated code during optimized translation of the foreign code, wherein each recovery point represents a foreign state;
generating a set of documentations during the optimized translation of the foreign code, wherein each documentation in the set of documentations corresponds to a recovery point in the optimized binary translated code and describes operations required to calculate a corresponding foreign state for the recovery point; and

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Bluebook (online)
77 F. Supp. 3d 756, 2015 WL 94117, Counsel Stack Legal Research, https://law.counselstack.com/opinion/cascades-computer-innovation-llc-v-samsung-electronics-co-ilnd-2015.