U.S. Ethernet Innovations, LLC v. Acer, Inc.

646 F. App'x 929

• Court: Court of Appeals for the Federal Circuit
• Decided: April 25, 2016
• Docket: 2015-1640, 2015-1641
• Status: Unpublished

Opinion

LINN, Circuit Judge.

U.S. Ethernet Innovations, LLC (“USEI”) appeals the decision of the United States District Court for the Northern District of California, granting Acer, Inc.’s and other appellees and intervenor Intel Corp.’s (collectively, “Appellees”) motion for summary judgment of invalidity of U.S. Patent Nos. 5,434,872 (“'872 patent”) and 5,732,094 (“'094 patent”), directed to an apparatus for and process of Ethernet data transmission. U.S. Ethernet Innovations, LLC. v. Acer, Inc., No. 4:10-cv-3724 (N.D.Cal. Oct. 10, 2014). Because the district court did not misconstrue the claim language, and because the parties agree on the disposition in light of this claim construction, we affirm.

BACKGROUND 1

USEI is the successor in interest to 3Com, which developed the Ethernet technology embodied in the '872 and '094 patents. 2 Ethernet technology was developed in the early 1980s and, much improved, is still the predominant form of wired communication between multiple computers on a local area network. Each computer is connected to the network via an Ethernet network adapter, also known as a network interface controller. The network adapter typically includes, inter alia, a transmit buffer, where data bound for the network from the host computer rests before being transferred to the network itself. The nature of the transmit buffer is the technology at issue in the instant appeal.

According to the '872 patent, the prior art included two basic types of transmit buffers. The first type, called a dedicated transmit buffer, downloads a frame of data from a computer, and “stor[es]” the frame until it is successfully transferred to the network, or the transmission is cancelled by other components of the network adapter. Id. at col. 1, 11. 39-48. An advantageous feature of the dedicated transmit buffer is the ability to store — and, in the case of a failed transmission, re-transmit— an entire Ethernet frame of 64-bytes. Id. at col. 1, 11. 39-46. Dedicated transmit buffer systems have the disadvantage that the frame transmission from the buffer is delayed until all the data of the frame is first stored in the buffer before it is transmitted to the network. Id. at col. 1,11. 58-61. The '872 patent distinguishes this type of buffer from a “first-in-first-out FIFO system, in which the sending system downloads data of a frame into the FIFO, while the network adapter unloads the FIFO during a transmission.” Id. at col. 1, 11. 47-50. The FIFO system has the advantage of high system throughput, id. at col. 1, 11. 62-63, but the disadvantage that, in the case of a failed transmission, the buffer must restart receipt and transmission of the frame. The '872 patent cites a systems-oriented network interface controller (SONIC), which all parties agree is a FIFO-type system, as representative prior art. Id. at col. 2, 11. 3-5.

The '872 patent teaches the desirability of a hybrid system “to provide the advantages of a transmit data buffer, while maintaining the communications throughput available from the simpler FIFO based systems.” Id. at col. 2, 11. 7-10. To that end, “[t]he present invention provides for the early initiation of transmission of data in a network interface that includes a dedicated transmit buffer.” Id. at col. 2,11.13-15. USEI categorizes the subject matter of the '872 and '094 patents, as well as other formerly 3Com patents, as “parallel tasking” technology, a major aspect of which is “reducing the latency (i.e. delay) associated with transmission of data ... by incorporating an early transmit feature,” effectively allowing the buffer to transmit data to the network before all the data in a frame is received by the buffer.

Representative claim 1 of the '872 patent reads: 3

1. For a system transmitting frames of data across a communications medium; an apparatus comprising:

buffer memory for storing data of frames composed by the host computer for transmission on the communications medium;

means, having a host system interface, for transferring data of frames to the buffer memory;

means, coupled with the buffer memory, for monitoring the transferring of data of a frame to the buffer memory to make a threshold determination of an amount of data of the frame transferred to the buffer memory; means, responsive to the threshold determination of the means for monitoring, for initiating transmission of the frame prior to transfer of all the data of the frame to the buffer memory from the host computer;

transmit logic,, responsive to the means for initiating transmission, for retrieving data from the buffer memory and supplying retrieved data for transmission on the communications medium;

underrun control logic, which detects a condition in which the means for transferring falls behind the transmit logic, and supplies a bad frame signal to the communications medium in response to the underrun condition.

'872 patent, col. 30,11. 5-30 (disputed claim term underlined). The district court construed the term “buffer memory” as “a memory for temporary storage of data.” This construction is not directly on appeal here.

In 2009, USEI sued Appellee computer makers in the Eastern District of Texas for infringement of several patents, including the '872 and 094 patents at issue in this appeal. Intel Corporation and Marvell Semiconductor, Inc. intervened. On motion by the Appellees, the case was transferred to the Northern District of California. USEI also sued several end-users of the Defendant’s computers, which was also transferred to the Northern District of California, and related to the first.

Appellees motioned for summary judgment of anticipation of all asserted claims of the-'872 and '094 patents over the SONIC reference, a FIFO-type system cited in the specification, and USEI motioned for summary judgment of.no anticipation over SONIC, on the basis that the claims require capacity in the buffer to hold at least a full-sized 64-byte Ethernet frame, and SONIC indisputably does not.

The district court granted Appellees’ motion, holding that “the plain language of the claims says nothing about the buffer memory’s ability to hold a complete frame of data,” and explaining that adding such an ability would improperly import a limitation from the specification into the claims. U.S. Ethernet Innovations, LLC v. Acer, Inc., No. 10-3724, at 5-10, 2014 WL 5812175 (N.D.Cal. Nov. 7, 2014) (hereinafter, “Summary Judgment Op.”)

USEI timely appealed. We have jurisdiction over an appeal from a final decision from a district court “related to patents” under 28 U.S.C. § 1295(a)(1).

Discussion

We begin by addressing whether the district court erred in granting summary judgment of invalidity of all claims of the '872 and '094 patents as anticipated by SONIC. 4

Under Ninth Circuit law, we review the grant of summary judgment of invalidity here de novo, Jesinger v. Nevada Fed. Credit Union, 24 F.3d 1127, 1131 (9th Cir. 1994), asking whether there is a genuine issue of material fact, Celotex Corp. v. Catrett, 477 U.S. 317, 323, 106 S.Ct. 2548, 91 L.Ed.2d 265 (1986), while construing the evidence in the light most favorable to the nonmoving party. Matsushita Elec. Indus. Co. v. Zenith Radio Corp., 475 U.S. 574, 587, 106 S.Ct. 1348, 89 L.Ed.2d 538 (1986).

Anticipation is an issue of fact, but reviewed de novo when decided on summary judgment. OSRAM Sylvania, Inc. v. Am. Induction Techs., Inc., 701 F.3d 698, 704 (Fed.Cir.2012). When there are no factual disputes, the anticipation issue collapses into an issue of claim construction, which we review de novo as an issué of law. Athletic Alts., Inc. v. Prince Mfg., Inc., 73 F.3d 1573, 1578 (Fed.Cir.1996) (“Where, as here, the parties do not dispute any relevant facts regarding the accused product but disagree over which of two possible meanings of Claim 1 is the proper one, the question of literal infringement collapses to one of claim construction and is thus amenable to summary judgment.”); Gen. Mills, Inc. v. Hunt-Wesson, Inc., 103 F.3d 978, 983 (Fed.Cir.1997) (same).

As the district court correctly noted, the anticipation question here collapses into a question of claim construction. See Summary Judgment Op. at 9 (“In essence, USEI does not dispute any relevant facts regarding the alleged anticipating SONIC prior art, but only disagrees over an interpretation of the claim language. This renders the anticipation issue of claim construction, which is a question of law.”). Both parties agree that SONIC cannot hold a full-sized Ethernet frame, and cannot retransmit a packet of data to the network without retrieving it again from the host computer. Both parties agree that if the claims require the buffer to be capable of storing a full-sized Ethernet frame, then the claims do not read on SONIC, and summary judgment was improper. Similarly, both parties agree that if the claims do not require the buffer to be capable of storing a full-sized Ethernet frame, then SONIC anticipates the claims, and summary judgment was proper. This is a paradigmatic situation of anticipation collapsing into claim construction.

The dispute centers on the element, “buffer memory for storing data of frames ... for transmission.” According to USEI, that element, when read in light of the specification and other claim elements, requires the buffer to have capacity to store an entire Ethernet frame. USEI supports its understanding with numerous statements in the specification indicating the nature of the invention and describing preferred embodiments. See '872 patent, Abstract (“Early initiation of transmission of data in a network interface that includes a dedicated transmit buffer is provided....”); id. at col. 2, 11. 7-10 (“It is desirable to provide the advantages of a transmit data buffer, while maintaining the communications throughput available from the simpler FIFO based systems.”); id. at col. 2, 11. 13-15 (“The present invention provides for the early initiation of transmission of data in a network interface that includes a dedicated transmit buffer.”); id. at col. 18, 11. 31-35 (“The actual frame transmission onto the network will commence when two conditions are met: (1) the XMIT [transmit] START THRESH[hold] (described below) condition has been met, or, if XMIT START THRESH is zero, when the entire frame has been copied to the adapter’s RAM, and (2) when there are no previously queued transmit requests.”); id. at col. 29, 11. 28-31 (“If, however, the threshold value is greater than or equal to the frame length, then transmission will commence once the entire frame is resident on the adapter.”). USEI argues that persons of ordinary skill would read the claim language, “storing data of frames ... for transmission” to incorporate the full-frame storage capability from the specification.

USEI’s arguments are unconvincing. While we certainly read the claims in light of the specification, Phillips v. AWH Corp., 415 F.3d 1303, 1315 (Fed.Cir.2005) (en banc), “[i]t is a bedrock principle of patent law that the claims of a patent define the invention to which the patentee is entitled the right to exclude,” id. at 1312 (internal quotes omitted). Here, all that the claims require is that the buffer memory “stor[e] data of frames ... for transmission.” On its face, the claim says nothing about a buffer’s minimum storage capacity. The statements in the specification cited above purporting to define the invention are inapposite without language in the claims indicating a desire to claim the teachings disclosed.

The claims do not say that the buffer must “store all the data of frames,” or “store entire frames of data,” or, tellingly, that the buffer even “store frames of data.” The distinction between “data of frames” and “frames of data” is important in the context of the '872 patent because when the patent uses the phrase “data of frames,” it is consistently referring to less than an entire Ethernet frame of data, while entire Ethernet frames of data are referred to as “frames of data” or “all of the data of the frame.” 872 patent, col. 1, 11. 36-49 (“Some network adapter interfaces included dedicated transmit buffers, into which a frame of data ... can be downloaded by the sending system.... Transmit data buffers are to be distinguished from first-in-first-out FIFO systems, in which the sending system downloads data of a frame into the FIFO.”); id. at col. 2, 11. 15-22 (“The system includes logic for transferring frames of data composed by the host computer into the transmit buffer. Also, the amount of data of a frame which is downloaded by the host to the transmit buffer is monitored to make a threshold determination of an amount of data of the frame resident in the transmit buffer.”); id. at col. 2, 11. 22-27 (“The network interface controller includes logic for initiating transmission of the frame ... prior to the transfer of all of the data of the frame into the transmit buffer.”); id. at col. 4, 11. 41-45 (“[A] threshold store which stores a threshold value which indicates an amount of data of a frame that must be resident in the frame buffer before transmission of that frame may be initiated.”). The claims say only “data of frames,” indicating that the buffer need not be capable of storing an entire Ethernet frame of data.

USEI also argues that a buffer with a capacity less than a full Ethernet frame cannot “stor[e]” data of frames. USEI made and explained this position during oral argument: “Our view is, the claim language ‘storing data ... for transmission’ requires the element of the transmit data buffer to have that data locally to ensure transmission, so it doesn’t have to go back to the host computer and interrupt it.” Oral Argument at 6:20-6:36, USEI v. Acer, Inc., No. 2015-1640-1641 (Fed. Cir., argued Mar. 11, 2016), available at http://l. usa.gov/lUBeBP3 (herein-after, “Acer Oral Argument”); see also id. at 6:01-6:15 (“I believe the patent language, ‘to successfully transmit’ it would have to have the first 64 bytes so it didn’t have to go back to the host to re-download the data.”). USEI argues that FIFOs do not and cannot “store” data, but merely “unload” the bytes. This argument, too, lacks merit. First, and most clearly, the claims do not include the element, “transmit data buffer.” Instead, the claims use the notably broader phrase, “buffer memory.” There is no basis, therefore, to adopt USEI’s argument to incorporate the characteristics of transmit data buffers into the claims. Second, there is no claim requirement that the buffer “successfully transmit” the data in the sense of requiring local storage of the data. That functionality is contained in the specification in the description of the prior art, see '872 patent at col. 1, 11. 39-43, and not in any of the asserted claims. Third, as USEI admitted during oral argument in the companion Texas Instruments case, it is undisputed that SONIC holds onto some amount of data of frames until a threshold amount of data enters the buffer, at which point SONIC unloads that data without retaining any of it. Oral Argument at '24:52-25:20 and 26:20-26:35, U.S. Ethernet Innovations, LLC v. Texas Instruments, Inc., No. 2015-1510 (Fed. Cir., argued Mar. 11, 2016), available at http://l.usa.gov/lUBeBP 3 (herein-after, -“Texas Instrument Oral Argument”). The data waiting to be transferred before this threshold is reached is “stored,” by any natural reading of the word. USEI argues that this is not enough, because “the language in column 1 requires storage for successful transmission. Under the Ethernet standard, that’s 64 bytes.” Oral argument at 10:58-11:08. Similar to the problem with USEI’s other arguments, nothing in the claims requires a special type of storage where all the data of the frame is stored until after it is transmitted.

Next, USEI argues that constructing the claim to allow buffers without full frame storage capacity would render superfluous the claim limitation “means ... for initiating transmission of the frame prior to transfer of all of the data of the frame to the buffer memory from the host computer.” That phrase does not necessarily require the capability of transferring all of the data of the frame to the buffer memory — a buffer that can store 32 bytes of data, but can begin transmission when 16 bytes are written to the buffer would meet the limitation. Indeed, this limitation actually undermines USEI’s argument, because it shows that where the patent intended to indicate all the data of the frame in the claim, it said so. The failure to say “all the data of the frame” in the claim element “storing data of frame ... for transmission” again indicates that that element does not require a full frame of data.

Finally, USEI spends much of its brief and its oral argument discussing the testimony of several experts with respect to the interpretation of the claims. USEI argues that nine of the ten experts understood the claims as requiring a buffer with full Ethernet frame capability. Setting aside the accuracy of USEI’s characterization of the expert testimony, the expert opinions do not answer the claim construction issue before us. Though we look at the claims from the perspective of those of ordinary skill in the art, Multiform, Desiccants, Inc. v. Medzam, Ltd., 133 F.3d 1473, 1477 (Fed.Cir.1998) (cited in Phillips, 415 F.3d at 1313), experts “cannot be used to prove the proper or legal construction of any instrument of writing,” Teva Pharm. USA, Inc. v. Sandoz, Inc., — U.S.-, 135 S.Ct. 831, 841, — L.Ed.2d-(2015) (citing Winans v. New York & Erie R. Co., 21 How. 88, 100-101, 16 L.Ed. 68 (1859)), and “in the actual interpretation of the patent the court proceeds upon its own responsibility, as an arbiter of the law, giving to the patent its true and final character and force,” id. (citing Markman v. Westview Instruments, Inc., 517 U.S. 370, 388, 116 S.Ct. 1384, 134 L.Ed.2d 577 (1996)).

Contrary to USEI’s contentions, this case cannot be decided by reading the first column and a half of the patent and ignoring what the claims actually recite. See Acer Oral Argument, at 1:30-1:36. USEI has failed to bridge the significant gap between the claim language and the teachings of the specification.

Conclusion

For the foregoing reasons, we affirm the district court’s determination that nothing in the claims requires the buffer memory to be capable of storing 64 bytes of data. Because there is no factual dispute that the remaining elements of the asserted claims of the '872 and '094 patents are contained in the SONIC prior art, we affirm the determination of the district court that all asserted claims of the '872 and '094 patents are invalid as anticipated over the SONIC reference.

AFFIRMED.

1 . Because we write for the parties, familiarity with the background of this case is assumed and presented herein only to the extent necessary to provide context for the analysis that follows.

2 . The '872 patent and the '094 patent share a specification, with the '872 patent directed to apparatus claims and the '094 directed to method claims. All citations to the specification in this opinion are to the '872 patent.

3 . USEI does not separately argue the patenta-bility of other claims in the '872 patent or the '094 patent. All asserted claims of both patents are thus analyzed together according to representative claim 1 in the '872 patent.

4 . USEI also argues that the district court erred by 1) denying USEI’s motion for summary judgment of no laches due to Intel’s intentional copying of 3 Corn's Ether-Link III Ethernet adapter, and 2) granting partial summary judgment of failure to mark under 35 U.S.C. § 287 on IBM and Intel licensed goods. Because we hold that all the claims of the '872 and '094 patents at issue are invalid as anticipated, we need not and do not address these additional issues.