Inphi Corporation v. Netlist, Inc.

805 F.3d 1350, 116 U.S.P.Q. 2d (BNA) 2006, 2015 U.S. App. LEXIS 19746, 2015 WL 7076139
CourtCourt of Appeals for the Federal Circuit
DecidedNovember 13, 2015
Docket2015-1179
StatusPublished
Cited by19 cases

This text of 805 F.3d 1350 (Inphi Corporation v. Netlist, Inc.) is published on Counsel Stack Legal Research, covering Court of Appeals for the Federal Circuit primary law. Counsel Stack provides free access to over 12 million legal documents including statutes, case law, regulations, and constitutions.

Bluebook
Inphi Corporation v. Netlist, Inc., 805 F.3d 1350, 116 U.S.P.Q. 2d (BNA) 2006, 2015 U.S. App. LEXIS 19746, 2015 WL 7076139 (Fed. Cir. 2015).

Opinion

O’Malley, Circuit Judge.

Netlist, Inc. (“Netlist”) is the assignee of U.S. Patent No. 7,532,537 (“the '537 patent”). Inphi Corporation (“Inphi”) filed a request for inter partes reexamination 1 on June 9, 2010. The examiner rejected claims 1-9, 12-31, and 34-44 as obvious in view of the prior art. In order to overcome this rejection, Netlist amended its claims, narrowing them. Thereafter, the examiner withdrew its rejection of the claims and issued a final decision.

Inphi then filed a Notice of Appeal to the Patent Trial and Appeal Board (“PTAB” or “the Board”), alleging, among other things, that the amendment, which introduced a negative claim limitation, failed to satisfy the written description requirement of 35 U.S.C. § 112, paragraph 1 (2006). 2 The Board issued a decision affirming the examiner’s final decision declining to reject the relevant claims. Inphi Corp. v. Netlist, Inc., No. 2013-009066, 2014 WL 187535 (P.T.A.B. Jan. 16, 2014). Inphi filed a request for rehearing on February 18, 2014. The Board denied Inphi’s request and affirmed its decision. Inphi Corp. v. Netlist, Inc., No. 2013-009066, 2014 WL 4180943 (P.T.A.B. Aug. 13, 2014) (“Board, Decision”). Inphi appeals from this decision. Because the Board’s determination that the negative claim limitation met the requirements of § 112, paragraph 1 is supported by substantial evidence, we affirm.

*1352 BACKGROUND

The '537 patent, entitled “Memory Module with a Circuit Providing Load Isolation and Memory Domain Translation” has an application date of January 19, 2006. 3 The invention relates to computer system memory modules, which Netlist designs and manufactures. In particular, the invention improves the performance and/or capacity of the memory modules. '537 Patent, col. 1,11. 29-32. Conventional computer systems, such as a desktop PC or a laptop, are compatible with modular memory systems. Users may simply insert a memory module into a slot or socket in the motherboard of their personal computer. The '537 patent concerns random access memory (“RAM”), which provides short-term storage of data for active software programs. Greater performance and/or capacity RAM leads, in general, to a better performing computer.

The memory module itself comprises a printed circuit board, on which memory devices (also known as memory chips) are mounted:

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'537 Patent, Figure 16A. Figure 16A presents one side of a printed circuit board, 460. The memory devices — 410, 420 — of which there can be up to eighteen, are shown attached to the printed circuit board. The specification discloses multiple memory device types, including “random-access memory (RAM), dynamic random-access memory (DRAM), synchronous DRAM (SDRAM), and double-data-rate DRAM (e.g., SDR, DDR-1, DDR-2, DDR3).” Id. at col. 5,11. 41-44.

The memory devices, therefore, can be of the Double Data Rate (“dDDR”) Synchronous Dynamic RAM (“SDRAM”) type. See id. at col. 36, 11. 28-31 (“In certain embodiments, the memory module 400 is a 1-GB unbuffered Double Data Rate (DDR) Synchronous Dynamic RAM (SDRAM) high-density dual in-line memory module (DIMM).”). At issue in this appeal is a negative claim limitation Net-list introduced by amendment, limiting the claimed chip selects to exclude three particular types of signals (CAS, RAS, and bank-address signals). 4 Representative *1353 claim 1, as amended, is as follows:

1. A memory module comprising:
a plurality of memory devices, each memory device having a corresponding load; and
a circuit electrically coupled to the plurality of memory devices and configured to be electrically coupled to a memory controller of a computer system, the circuit selectively isolating one or more of the loads of the memory devices from the computer system, the circuit comprising logic which translates between a system memory domain of the computer system and a physical memory domain of the memory module, wherein the system memory domain is compatible with a first number of chip selects, and the physical memory domain is compatible with a second number of chip selects equal to twice the first number of chip selects, wherein the plurality of memory devices comprises double-data rate (DDR) dynamic random-access memory (DRAM) devices and the chip selects of the first and second number of chip selects are DDR chip selects that are not CAS, RAS, or bank address signals.

Joint Appendix (“J.A.”) 1366 (emphasis added). While the entire emphasized portion was added during reexamination, In-phi challenges only the underlined portion: “DDR chip selects that are not CAS, RAS, or bank address signals.” The examiner found the amendment sufficient to overcome its obviousness rejections. The Board affirmed the examiner’s determination. Inphi contends, to the contrary, that the negative claim limitation added by amendment is not supported by the specification and thus constitutes impermissible new matter in violation of 35 U.S.C. § 112, paragraph 1.

Inphi requested rehearing of the Board’s decision affirming the examiner. In its request, Inphi emphasized this court’s decision in Santarus, Inc. v. Par Pharm., Inc., 694 F.3d 1344, 1351 (Fed.Cir.2012), which states that “[negative claim limitations are adequately supported when the specification describes a reason to exclude the relevant limitation.” Inphi argued that “[w]hile the Board gives lip service to the standard articulated in San=tarus ... the Board also acknowledged that in this case there is no such reason expressly articulated in the specification.” J.A. 2241.

The Board explained in its decision on Inphi’s request for rehearing that, “the '537 patent did not articulate expressly a reason to exclude RAS and CAS signals .... ” Board Decision, 2014 WL 4180943, at *1. The Board identified, however, three parts of the specification of the '537 patent upon which it relied in finding that the negative claim limitation was reasonably supported: “(1) consistency with [Joint Electron Device Engineering Council (“JEDEC”)] standards; (2) the '537 patent’s excluding RAS and CAS signals in Table 2; and (3) various other passages from .the '537 patent [including Figure 9A]....” Id.

The JEDEC is a global standard setting body for the microelectronics industry. The '537 patent incorporates by reference a JEDEC standards publication for DDR-1 memory devices, namely the JEDEC “Double Data Rate (DDR) SDRAM Specification,” published February 2004 (“JESD79D”). J.A. 1866-1948.

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805 F.3d 1350, 116 U.S.P.Q. 2d (BNA) 2006, 2015 U.S. App. LEXIS 19746, 2015 WL 7076139, Counsel Stack Legal Research, https://law.counselstack.com/opinion/inphi-corporation-v-netlist-inc-cafc-2015.