Lane, Judge.’
The United States (hereinafter Government) appeals from the order and judgment of the United States Customs Court in 75 Cust. Ct. 267, P75/653 (1975), granting appellee’s motion for summary [25]*25judgment and denying appellant’s cross motion for summary judgment. Tbe Customs Court beld tbat certain imported transistors qualified for item 807.00, TSUS, treatment and tbat as a result tbe cost or value of tbe transistor chips used in the assembly of tbe imported transistors could be deducted from tbe appraised value, of tbe imported transistors. We affirm.
The Importation
Tbe imported transistors are described as being of two types, viz.; tbe MOP 3904 Silect Transistor and tbe TIC 44 Power Transistor;
The Statutory Provisions
Appellee claims tbat tbe cost or value of tbe transistor chips used in assembling the imported transistors should be deducted from tbe value of the transistors pursuant to tbe provisions of item 807.00, TSUS, which provides:
SCHEDULE 8.-SPECIAL CLASSIFICATION PROVISIONS
*******
Part 1.-Articles Exported and Returned
4c cfc * * * * *
Subpart B. - Articles Advanced or Improved Abroad
*******
Item 807.00 Articles assembled abroad in whole or in part of fabricated components, tbe product of tbe United States, which (a) were exported in condition ready for assembly without further fabrication, (b) have not lost their physical identity in such articles by change in form, shape, or otherwise, and (c) have not been advanced in value or improved in condition abroad except by being assembled and except by operations incidental to tbe assembly process such _ as cleaning, lubricating, and paint-ing_ A duty upon value of tbe imported article, less tbe cost or value of such products of the United States (see headnote 3 of this subpart).
[26]*26Background
The imported transistors are the end result of a very sophisticated and complex set of processing steps which begin in the United States and are completed abroad. The processing steps for producing both types of transistors are similar, so only those for the MPC 3904 Silect Transistor will be described.
The first step in the process is the production of a hyper-pure silicon base material from metallurgical grade silicon. This high purity silicon is heated together with a precise amount of a conductivity type controlling element and is maintained in a molten condition while a single crystal silicon seed, having a predetermined crystalline orientation, is dipped into the molten silicon and is slowly withdrawn, while being rotated, permitting the growth of a single crystal silicon cylinder or ingot of approximately 2" in diameter and 32" to 33" in length. This ingot is then “flat” ground 1 and sawed into slices. Careful attention must be given to the crystalline orientation of the silicon in locating the position of the flat and in the slicing operations; otherwise, the slices will break along indeterminable and uncontrolled lines. The silicon slice serves as a substrate upon which silicon in single crystal form and of predetermined electrical characteristics is deposited by an epitaxial process. The epitaxial layer is coated with a silicon dioxide film and then subjected to the first of five photomasking operations. The first photomasking operation opens thousands of windows in the silicon dioxide film, through which selected impurities are introduced into the epitaxial layer to form the base region for thousands of transistors. A second photomasking operation follows, which allows for the introduction of another selected impurity to form emitter regions in each of the previously formed base regions. At this point thousands of individual silicon transistor chips have been formed on each silicon slice. The remaining three photomasking operations provide aluminum contacts with the emitter and base regions of each transistor chip and a protective overcoating of the silicon transistor chips with holes therein, so that conductive wires may be bonded to the provided aluminum contacts.2 Each silicon transistor chip is then electrically tested and evaluated for its performance characteristics. Those which fail to meet minimum set performance parameters are rejected and are so noted by the application of a colored ink thereon. The thousands of transistor chips are arranged in rows and columns on the silicon slices with so-called “streets” separating them from one another. These slices, which up to this point have been completely fabricated [27]*27and tested in the United States, are tben shipped abroad for the •assembly of the individual transistor chips into operative transistors.
The first step in the foreign assembly process is the scoring of the silicon slice along the “streets.” The scored shoe is then placed in an evacuated plastic bag and is broken along the score lines, resulting in the separation of the individual transistor chips. After the transistor «hips marked with colored ink are discarded, those remaining are finally assembled into the finished transistors. The collector (which is the original epitaxial layer) of each transistor chip is bonded to one of the three stiff lead wires held in position by a fixture. A single fine gold wire is bonded between the emitter contact and a second of the lead wires, and a second fine gold wire is bonded between the base contact and the third lead wire. The complete assembly is then molded in a plastic compound by means of a mold press. After molding, the transistor is electically tested and is shipped back to .the United States.
The Arguments
The Government contends that the Customs Court erred in finding the imported goods classifiable under item 807.00. Specifically, the Government contends that the transistor chips used in the assembly of the imported transistors were not “exported in condition ready for assembly without further fabrication” (clause (a) of item 807.00), because the exported silicon slices had to be scored and broken before the individual transistor chips could be used in the assembly of the transistors. This scoring, the Government contends, is a precise, complex machining process conducted at extremely dose tolerances which is a step in the further fabrication of the silicon transistor chips (clause (a) of item 807.00) which results in their enhancement in value or improvement in condition (clause (c) of item 807.00). The Government also contends that the legislative history surrounding item 807.00 further indicates that the scoring step should be considered a “further fabrication.”
Appellee, for its part, argues that, as exported, each silicon transistor chip was in a condition ready for assembly without further fabrication ; after the creation and testing of each individual silicon transistor chip in the United States, everything necessary to produce a functional transistor had been done. It further argues that the thousands of transistor chips were specially arranged on the silicon slice to produce the “streets” along which later scoring and breaking could occur to effect an easy separation of the chips. This separation, appellee contends, did not amount to a further fabrication of the chips, nor did it advance them in value within the meaning of clause (c) of item 807.00.
[28]*28OPINION
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Lane, Judge.’
The United States (hereinafter Government) appeals from the order and judgment of the United States Customs Court in 75 Cust. Ct. 267, P75/653 (1975), granting appellee’s motion for summary [25]*25judgment and denying appellant’s cross motion for summary judgment. Tbe Customs Court beld tbat certain imported transistors qualified for item 807.00, TSUS, treatment and tbat as a result tbe cost or value of tbe transistor chips used in the assembly of tbe imported transistors could be deducted from tbe appraised value, of tbe imported transistors. We affirm.
The Importation
Tbe imported transistors are described as being of two types, viz.; tbe MOP 3904 Silect Transistor and tbe TIC 44 Power Transistor;
The Statutory Provisions
Appellee claims tbat tbe cost or value of tbe transistor chips used in assembling the imported transistors should be deducted from tbe value of the transistors pursuant to tbe provisions of item 807.00, TSUS, which provides:
SCHEDULE 8.-SPECIAL CLASSIFICATION PROVISIONS
*******
Part 1.-Articles Exported and Returned
4c cfc * * * * *
Subpart B. - Articles Advanced or Improved Abroad
*******
Item 807.00 Articles assembled abroad in whole or in part of fabricated components, tbe product of tbe United States, which (a) were exported in condition ready for assembly without further fabrication, (b) have not lost their physical identity in such articles by change in form, shape, or otherwise, and (c) have not been advanced in value or improved in condition abroad except by being assembled and except by operations incidental to tbe assembly process such _ as cleaning, lubricating, and paint-ing_ A duty upon value of tbe imported article, less tbe cost or value of such products of the United States (see headnote 3 of this subpart).
[26]*26Background
The imported transistors are the end result of a very sophisticated and complex set of processing steps which begin in the United States and are completed abroad. The processing steps for producing both types of transistors are similar, so only those for the MPC 3904 Silect Transistor will be described.
The first step in the process is the production of a hyper-pure silicon base material from metallurgical grade silicon. This high purity silicon is heated together with a precise amount of a conductivity type controlling element and is maintained in a molten condition while a single crystal silicon seed, having a predetermined crystalline orientation, is dipped into the molten silicon and is slowly withdrawn, while being rotated, permitting the growth of a single crystal silicon cylinder or ingot of approximately 2" in diameter and 32" to 33" in length. This ingot is then “flat” ground 1 and sawed into slices. Careful attention must be given to the crystalline orientation of the silicon in locating the position of the flat and in the slicing operations; otherwise, the slices will break along indeterminable and uncontrolled lines. The silicon slice serves as a substrate upon which silicon in single crystal form and of predetermined electrical characteristics is deposited by an epitaxial process. The epitaxial layer is coated with a silicon dioxide film and then subjected to the first of five photomasking operations. The first photomasking operation opens thousands of windows in the silicon dioxide film, through which selected impurities are introduced into the epitaxial layer to form the base region for thousands of transistors. A second photomasking operation follows, which allows for the introduction of another selected impurity to form emitter regions in each of the previously formed base regions. At this point thousands of individual silicon transistor chips have been formed on each silicon slice. The remaining three photomasking operations provide aluminum contacts with the emitter and base regions of each transistor chip and a protective overcoating of the silicon transistor chips with holes therein, so that conductive wires may be bonded to the provided aluminum contacts.2 Each silicon transistor chip is then electrically tested and evaluated for its performance characteristics. Those which fail to meet minimum set performance parameters are rejected and are so noted by the application of a colored ink thereon. The thousands of transistor chips are arranged in rows and columns on the silicon slices with so-called “streets” separating them from one another. These slices, which up to this point have been completely fabricated [27]*27and tested in the United States, are tben shipped abroad for the •assembly of the individual transistor chips into operative transistors.
The first step in the foreign assembly process is the scoring of the silicon slice along the “streets.” The scored shoe is then placed in an evacuated plastic bag and is broken along the score lines, resulting in the separation of the individual transistor chips. After the transistor «hips marked with colored ink are discarded, those remaining are finally assembled into the finished transistors. The collector (which is the original epitaxial layer) of each transistor chip is bonded to one of the three stiff lead wires held in position by a fixture. A single fine gold wire is bonded between the emitter contact and a second of the lead wires, and a second fine gold wire is bonded between the base contact and the third lead wire. The complete assembly is then molded in a plastic compound by means of a mold press. After molding, the transistor is electically tested and is shipped back to .the United States.
The Arguments
The Government contends that the Customs Court erred in finding the imported goods classifiable under item 807.00. Specifically, the Government contends that the transistor chips used in the assembly of the imported transistors were not “exported in condition ready for assembly without further fabrication” (clause (a) of item 807.00), because the exported silicon slices had to be scored and broken before the individual transistor chips could be used in the assembly of the transistors. This scoring, the Government contends, is a precise, complex machining process conducted at extremely dose tolerances which is a step in the further fabrication of the silicon transistor chips (clause (a) of item 807.00) which results in their enhancement in value or improvement in condition (clause (c) of item 807.00). The Government also contends that the legislative history surrounding item 807.00 further indicates that the scoring step should be considered a “further fabrication.”
Appellee, for its part, argues that, as exported, each silicon transistor chip was in a condition ready for assembly without further fabrication ; after the creation and testing of each individual silicon transistor chip in the United States, everything necessary to produce a functional transistor had been done. It further argues that the thousands of transistor chips were specially arranged on the silicon slice to produce the “streets” along which later scoring and breaking could occur to effect an easy separation of the chips. This separation, appellee contends, did not amount to a further fabrication of the chips, nor did it advance them in value within the meaning of clause (c) of item 807.00.
[28]*28OPINION
We are guided in reaching our decision in this appeal by the precedents set in three prior cases which will be discussed in their order of decision.
The first was General Instrument Corp. v. United States, 59 CCPA 171, C.A.D. 1062, 462 F. 2d 1156 (1972). In that case, we had before us the question of whether certain imported transistors could quality for item 807.00 treatment. Fine gold wire was exported from the United States on spools and was used in the foreign assembly of the transistors. During: assembly, the free end of the fine gold wire on a spool was bonded to an aluminum strip on the semiconductor chip (referred to alternatively as a die or chip in that case) with the aid of a microscope. The wire was then severed from the spool by a flame, and the free end of the wire on the spool was then bonded to a second aluminum strip on the chip and likewise severed. An operator then welded the two fine gold wires attached to the chip to the transistor leads. Of some significance to the facts of this case was our statement on the techniques required for handling the fine gold wire:
Due to the small sizes of the parts and the fineness of the gold wire, which is barely visible to the naked eye, highly specialized techniques are required for handling and bonding it to the die. [59 CCPA at 173, 462 F. 2d at 1158.]
The uncontroverted evidence in that case further established that physical, chemical, and electrical properties of the wire were not changed during the course of assembly of the transistor. One of the theories advanced by the Government was that the cutting of the gold wire from the spools constituted a “further fabrication” and that the wire was not “exported in condition ready for assembly.” Therefore, the Government contended, classification of the imported transistors under item 807.00 was inappropriate because of noncompliance with clause (a) of that item. Although we were careful to confine our decision on the issue presented to the facts of the case then before us, we held that the exported gold wire was used in the assembly process without “further fabrication.”
A second case, General Instrument Corp. v. United States, 60 CCPA 178, C.A.D. 1106, 480 F. 2d 1402 (1973) involved the importation of electrolytic capacitors. The importer sought to have an allowance made under item 807.00 for the exported anode foil, cathode foil, paper, metal tabs, plastic insulating film, and cellophane tape used in the foreign assembly of the capacitors. All of the above components were exported in rolls of the proper width necessary for capacitor assembly except for the anode foil. During assembly of the capacitors the rolls of the components were cut to the proper length (in the case [29]*29of the anode foil, cutting to the proper width was also necessary).' This court discussed the question of whether the components were exported “in condition ready for assembly without further fabrication” ■and concluded that they were subject to the same type of tariff treatment under item 807.00 as the gold wire in the prior General Instrument ■case. The court, therefore, held the cutting to length of all the components and the trimming to width of the anode foil component to be an operation incidental to the assembly process and not “further fabrication,” as contended by the Government.
The third case, General Instrument Corp. v. United States, 61 CCPA 86, C.A.D. 1128, 499 F. 2d 1318 (1974), again involved the exportation of wire on spools which was used in the foreign assembly of deflection yokes for black and white television sets. The wire was despooled and wound on forms to the desired shape, after which it was taped, dipped into cement, and further shaped. Lead wires were also formed from supply spools, and, in forming them wire was drawn from the spool, cut to desired lengths, and the ends stripped of insulating material. The leads were then brought together with a plug assembly,. the wires woven into a cable harness, and the cable harness •secured with tape. The Government contended that the involved wire was subject to "further fabrication” and thus not entitled to treatment under item 807.00. We disagreed, holding the despooling, winding, taping etc., steps to be assembly steps rather than a “further fabrication” within the meaning of item 807.00.
Of course, while these cases serve as some guidance on the issues presented, they do not directly control. We must decide whether the scoring operation, which is somewhat related to the cutting of wire from a spool, amounts to “further fabrication” of the transistor chips under clause (a) of item 807.00. As a related issue3 we must also determine whether the transistor chips have been advanced in value or improved in condition by the scoring process, within the meaning ■of clause (c) of item 807.00. The parties agree that clause (b) of item 807.00 is not in issue.
After considering the evidence of record, including that showing the sophistication of the scribing operation, we hold that that operation does not constitute “further fabrication” within the meaning of clause (a). The articles in question are, of course, the individual transistor chips. These chips were completely fabricated and tested in the United States. To facilitate separation the “streets” were [30]*30provided in tbe silicon slice by the domestic manufacturing process'. These “streets” were properly oriented with respect to the crystalline structure of the silicon slice such that clean breackage would occur after scoring along the “streets.” Thus the lines of separation between the individual chips were clearly defined before exportation. All that remained to be done was the separation of the individual chips along the provided lines.
Although the scoring operation is somewhat precise in that the score must be made down a provided “street” at a proper depth, we find that this does not make the present cutting operation essentially different from the cutting operations performed on the wires or the foils in the General Instrument cases. It will be remembered that in the first General Instrument case highly specialized techniques were needed in handling, bonding, and cutting the wire therein involved because of its fineness. The transistor chips themselves are unchanged after the scoring and breaking operation; they are merely separated, as the wire and foil were separated from the supply spools in the prior cases.
As we observed in the first General Instrument case, we are not prepared to lay down a blanket rule that cutting or separating operation could never constitute a “further fabrication.” Suffice it to say that the facts of this case convince us that the scribing operation, which is part of the separation of the transistor chips and which does not otherwise affect them, is not “further fabrication” within the meaning of clause (a) of item 807.00. We also hold that the scribing operation was incidental to the assembly process, so that the imported transistors meet the requirements of clause (c) of item 807.00. We find nothing in the legislative history cited to us by appellant which is inconsistent with the position we take herein.
Taxation of Costs
Appellant has moved pursuant to our Rule 5.6(c) for an order to impose on appellee the cost of printing the Customs Court briefs as part of the transcript of record. Since the Customs Court merely entered its order and judgment without any written opinion in explanation thereof, the printed briefs were beneficial to this court as an aid in interpreting that order and judgment. Accordingly, appellant’s motion is denied.
For the reasons presented above, the judgment of the Customs Court is affirmed.