Texas Instruments Incorporated v. Cypress Semiconductor Corp.

5 F.3d 1504, 1993 U.S. App. LEXIS 33350, 1993 WL 280380

• Court: Court of Appeals for the Federal Circuit
• Decided: July 27, 1993
• Docket: 92-1530
• Status: Unpublished

Opinion

5 F.3d 1504

28 U.S.P.Q.2d 1154

NOTICE: Federal Circuit Local Rule 47.6(b) states that opinions and orders which are designated as not citable as precedent shall not be employed or cited as precedent. This does not preclude assertion of issues of claim preclusion, issue preclusion, judicial estoppel, law of the case or the like based on a decision of the Court rendered in a nonprecedential opinion or order.
TEXAS INSTRUMENTS INCORPORATED, Plaintiff-Appellant,
v.
CYPRESS SEMICONDUCTOR CORP., Defendant-Appellee.

No. 92-1530.

United States Court of Appeals, Federal Circuit.

July 27, 1993.

Before RICH, NEWMAN and RADER, Circuit Judges.

DECISION

RADER, Circuit Judge.

Texas Instruments Inc. (TI) appeals the judgment of the United States District Court for the Northern District of Texas entered in accordance with a jury verdict of invalidity and noninfringement of U.S. Patent No. 4,410,987 (the '987 patent). Because substantial evidence supports the jury's finding of indefiniteness as to claims 1-3 and its finding of noninfringement of claim 4, this court affirms.

OPINION

TI owns the '987 patent for a "Preload Test Circuit for Programmable Logic Arrays" (PLA). TI sued Cypress Semiconductor Corporation (Cypress) for infringement of the '987 patent in July 1990. After an eleven-day trial, the jury returned a special verdict form finding: (1) TI did not show infringement of the '987 patent; and (2) Cypress proved invalidity of the '987 patent due to prior invention, failure to disclose best mode, and indefiniteness.

The invention of the '987 patent is a separate circuit for "preloading" the output values of a PLA. A PLA consists of an array of logic gates (e.g. AND, OR) that compare digital inputs and determine proper outputs. Often PLAs contain feedback circuits that use a prior output value as another input value. In PLAs with feedback circuits, simple verification testing--verifying correct outputs from all possible inputs--is difficult because the initial output values (upon applying power to the chip) are unknown and unpredictable. The circuitry claimed in the '987 patent permits a tester to preload known output values in the feedback loop. This preloading simplifies the logic verification testing of the device.

Indefiniteness

The claims of a patent must "particularly point[ ] out and distinctly claim[ ] the subject matter which the applicant regards as his invention." 35 U.S.C. Sec. 112, second para. (1988). The claims, read in light of the specification, must "reasonably apprise those skilled in the art both of the utilization and scope of the invention," and the language must be "as precise as the subject matter permits." Hybritech Inc. v. Monoclonal Antibodies, Inc., 802 F.2d 1367, 1385, 231 USPQ 81, 94 (Fed.Cir.1986), cert. denied, 480 U.S. 947 (1987) (quoting Shatterproof Glass Corp. v. Libbey-Owens Ford Co., 758 F.2d 613, 624 (Fed.Cir.1985)). As the jury found, claim 1 of the '987 patent does not satisfy these requirements.

Claim 1 reads:

A preload circuit providing an enhanced testability for programmable logic array devices comprising a signal input connection, a preload circuit enable connection, and at least one connection for input to a feedback circuit of a programmable logic device, wherein said preload circuit operates to set a data bit signal selected by a test program into said feedback circuit.

(Emphasis added.) The highlighted clauses contain functional, not structural language.1 The only structural recitations in the claim are three "connections." Webster's Dictionary defines "connection" as "something that connects," or something which "join[s] or fasten[s] together." Webster's II New Riverside University Dictionary, 299-300 (1988). This claim for a preload "circuit" recites no limitations on the circuitry linked together by these "connections." The claim language literally claims three points in space.

TI's expert, however, construed the language "connection for input to a feedback circuit" to mean the test circuitry carrying the desired signal from the input circuit directly to the feedback circuit. TI uses this type of construction for all three "connections," construing the connection as encompassing the circuitry it "connects."

Patentees may be their own lexicographers. Fromson v. Advance Offset Plate, Inc., 720 F.2d 1565, 1569, 219 USPQ 1137, 1140 (Fed.Cir.1983). Patentees must, however, use their words consistently and make the meaning of their words reasonably clear. See ZMI Corp. v. Cardiac Resuscitator Corp., 844 F.2d 1576, 1580, 6 USPQ2d 1557, 1560 (Fed.Cir.1988); Codex Corp. v. Milgo Elec. Corp., 717 F.2d 622, 627, 219 USPQ 499, 503 (1st Cir.1983), cert. denied, 466 U.S. 931 (1984); Ellipse Corp. v. Ford Motor Co., 452 F.2d 163, 167, 171 USPQ 513, 514-15 (7th Cir.1971), cert. denied, 406 U.S. 948 (1972).

At most, TI refers to one passage in the '987 specification suggesting that "connection" means more than a mere link. Column 2, lines 19-21 state: "The connection in the preload circuit to a feedback circuit is comprised of circuitry capable of...." This single reference, however, does not overcome numerous other references to "connection" which use its conventional definition. For example, the specification describes circuit operation "when the preload circuitry is enabled by application of sufficiently high voltage at connection 21." Column 3, lines 4-6. Connection 21 refers to a point in the wiring diagram, not a group of circuits. Thus, the specification lacks a consistent usage or clear definition of the term "connection."

More important, TI uses the term "connection" inconsistently within the claims themselves. Claim 2 reads: "A preload circuit as in claim 1, wherein said signal input connection normally functions as an array output connection." If "connection" means circuitry, as TI contends, this claim is incomprehensible. The specification describes the preloading circuitry as completely independent of the main circuitry of the logic device. That is a key feature of the invention. Yet, claim 2 states that the "connection" in claim 1 functions as an array output "connection." If "connection" does indeed mean "circuitry," claim 2 requires the preloading circuitry to normally function as array output "circuitry." Such operation is impossible under the disclosure of the specification.

The circuitry is entirely different. Claim 2 obviously uses "connection" in the sense of a terminal or link. No other construction is plausible. While this court must construe claims in light of the specification and in a manner that preserves their validity, if possible, it may not import wholesale the specification into the claims. Intervet Am., Inc. v. Kee-Vet Labs., Inc., 887 F.2d 1050, 1053, 12 USPQ2d 1474, 1476 (Fed.Cir.1989).

Thus, this court holds that the jury could have reasonably interpreted the term "connection" within the claims to mean "link." As such, the jury properly read claim 1 to claim essentially three points in space, an interpretation which renders the claim completely indefinite. Claims 2 and 3, depending from claim 1, add no saving structural limitations and are also indefinite. Claim 3 merely adds a limitation that the enable connection "is common with" or is connected to all the array outputs. Here again, the only plausible usage is "connection" equals terminal. Because this court holds that the jury correctly found claims 1, 2, and 3 indefinite,2 it need not address TI's objections to the jury instructions delivered by the district court.

Noninfringement

Finally, Claim 4 covers the simple method of testing a circuit by preloading feedback circuitry with known logic values, applying known inputs, and monitoring the outputs to see if they are correct. Cypress presented evidence that, with their new and more reliable CMOS technology, testing was not performed before shipment. Nor did Cypress's customers use such testing procedures. Cypress also presented evidence that a statement in the Cypress data book, describing a testing procedure within the ambit of claim 4, was merely left over from earlier versions and had no effect. The testimonial evidence was substantial and adequately supports the jury's verdict of noninfringement of claim 4.

COSTS

Each party to bear its own costs.

PAULINE NEWMAN, Circuit Judge, concurring in part, dissenting in part, and concurring in the judgment.

I would affirm the jury verdict of noninfringement, because review shows that it is supported by substantial evidence, and that a reasonable jury could have made this factual determination. To this extent, I concur in the court's judgment.

* I respectfully dissent from the majority's conclusion that the claims are invalid for indefiniteness. The claims do not bear the flaws attributed to them by the panel majority, who require that the claims include information that is set forth in the specification or known to those of skill in the field, on pain of invalidity.

The panel majority concludes, for example, that claim 1 recites only three points in space with no other structure, without reference to what one skilled in the art would understand from a reading of the claim in light of the patent specification. The specification states the elementary fact that these points lie within the circuitry of a programmable logic array having a preload circuit. Programmable logic arrays have well-known structure, being collections of logic gates which are themselves composed of more elementary electronic components.

The patent specification makes clear what is meant by a preload circuit. Connections within such circuitry are no more "points in space" than are connections in any other circuit, as long as they are described with enough clarity that one skilled in the art can tell which devices fall within the scope of the claims and which do not. There was no evidence that a person skilled in the art would experience such difficulty. It is relevant that the claims were allowed by the patent examiner after full examination.

Cypress' patent expert at trial stated that the patent claims were invalid due to indefiniteness. Without considering either the specification or the knowledge of one skilled in the art, he made the irrelevant observation that the claims did not state how to make the connections set forth in the claims:

Well, I've got an enable connection, I've got an input connection, and I've got at least one other connection. What I don't have is any relationship between those things. I don't know how the enable connection connects to the input connection or how the input connection connects to the at least one other connection.... [T]his claim is going to cover anything that's got three connections in the box.

However, enablement is the function of the specification, not the claims. To argue that claims should contain information that they are not required to contain is an error of law. The testimony of a patent expert based on an obviously incorrect legal analysis is not evidence adequate to support the verdict. Cypress points to no other evidence of claim indefiniteness presented at trial.

The panel majority is troubled by the fact that the connections are claimed in functional language, e.g., "connection for input to a feedback circuit", rather than physical location, such as "emitter of transistor five". As a result, the claims do not teach the person of ordinary skill how to construct the device. But they do tell the person of ordinary skill whether any specific device lies within the scope of what the inventor has stated in the claims to be his invention. For any programmable logic array with a preload circuit, one skilled in the art can observe if there is a "signal input connection", a "connection for input to a feedback circuit", and a "preload circuit enable connection", and whether they operate to set a data bit signal into the feedback circuit.

Definiteness in the claims is determined in the context of the description in the specification and the skill of the art. That legal requirement is readily met here. Indeed, although Cypress stressed at the trial that the claims must contain details of the manner of making and using that which is claimed, misleading the trier of fact, Cypress does not emphasize this argument on appeal. However, on the correct legal standard, there is not substantial evidence to support the verdict of invalidity based on indefiniteness.

B

I agree that the jury's verdict of noninfringement is supported by substantial evidence. On this basis, I concur in the judgment in favor of Cypress Semiconductor.

1 Manual of Patent Examining Procedure (MPEP), Sec. 706.03(c) states that a "claim which contains functional language not supported by recitation in the claim of sufficient structure to warrant the presence of the functional language in the claim" should be rejected. The MPEP provides the example of "A woolen cloth having a tendency to wear rough rather than smooth."

2 At the close of Cypress's case for invalidity, TI "moved for judgment as a matter of law on each of 35 U.S.C. 102, 103, 112 and the fraud claim." At the close of all evidence, however, TI renewed its motion for judgment as a matter of law only with regard to inventorship, best mode, anticipation, obviousness, and fraudulent concealment. TI did not mention indefiniteness, infringement, or prior invention

Federal Rule of Civil Procedure 50(b) provides that:

Whenever a motion for a judgment as a matter of law made at the close of all the evidence is denied ... the court is deemed to have submitted the action to the jury subject to a later determination of the legal questions raised by the motion.

(Emphasis added.) Moreover, Rule 50(a) requires that such motions "specify the judgment sought and the law and the facts on which the moving party is entitled to the judgment." TI did not literally comply with Rule 50 in failing to renew its motion with regard to indefiniteness at the close of all the evidence and failing to specify at any time the law and facts justifying its preferred judgment.