Semcon IP Inc. v. Kyocera Corporation

District Court, E.D. Texas·Decided August 22, 2019·No. 2:18-cv-00197·Unknown

Opinion

IN THE UNITED STATES DISTRICT COURT FOR THE EASTERN DISTRICT OF TEXAS MARSHALL DIVISION SEMCON IP INC., § § Plaintiff, § § v. § Case No. 2:18-cv-00197-JRG § KYOCERA CORPORATION, § Defendant. § §

CLAIM CONSTRUCTION MEMORANDUM OPINION AND ORDER Before the Court is the opening claim construction brief of Semcon IP Inc. (“Plaintiff”) (Dkt. No. 46, filed on June 12, 2019),1 the response of Kyocera Corporation (“Defendant”) (Dkt. No. 48, filed on June 26, 2019), and Plaintiff’s reply (Dkt. No. 52, filed on July 3, 2019). The Court held a hearing on the issues of claim construction and claim definiteness on July 29, 2019. Having considered the arguments and evidence presented by the Parties at the hearing and in their briefing, the Court issues this Order.

1 Citations to the Parties’ filings are to the filing’s number in the docket (Dkt. No.) and pin cites are to the page numbers assigned through ECF. Table of Contents I. BACKGROUND ............................................................................................................... 3 II. LEGAL PRINCIPLES ..................................................................................................... 5 A. Claim Construction ................................................................................................. 5 B. Departing from the Ordinary Meaning of a Claim Term ........................................ 8 C. Definiteness Under 35 U.S.C. § 112, ¶ 2 (pre-AIA) / § 112(b) (AIA) ................... 9 III. AGREED CONSTRUCTIONS ..................................................................................... 10 IV. CONSTRUCTION OF DISPUTED TERMS ............................................................... 11 A. “computer processor,” “processor,” “central processor,” “processing unit,” and “processing device” ........................................................................................ 11 B. The Determining Terms ........................................................................................ 13 C. The Executing-Instructions-While-Changing-the-Voltage-Terms ....................... 15 D. The Operating-Conditions Terms ......................................................................... 17 E. “a counter” ............................................................................................................ 18 F. “clock frequency source,” “clock generator,” “clock frequency generator,” “programmable frequency generator,” and “frequency generator” ...................... 20 G. “a voltage source” ................................................................................................. 22 H. The Causing-a-Change-in-Voltage Terms ............................................................ 24 I. The Changing-the-Frequency-While-Execution-of-Instructions-is-Stopped Terms .................................................................................................................... 26 J. “level of permitted power” .................................................................................... 28 K. “… is not capable of functioning …” and “… can not function …” .................... 29 L. The Monitoring Terms .......................................................................................... 31 M. “reducing a magnitude of a difference” ................................................................ 33 V. CONCLUSION ............................................................................................................... 34 I. BACKGROUND Plaintiff alleges infringement of four U.S. Patents: No. 7,100,061 (the “’061 Patent”), No. 7,596,708 (the “’708 Patent”), No. 8,566,627 (the “’627 Patent”), and No. 8,806,247 (the “’247 Patent”) (collectively, the “Asserted Patents”). These patents are related through a series of continuation applications and all ultimately claim priority to the application that issued as the ’061

Patent, which was filed on January 18, 2000. The ’061 Patent was subject to an inter partes reexamination requested on June 13, 2007 and from which a certificate issued on August 4, 2009. The Court previously construed terms of the Asserted Patents in Semcon IP Inc. v. Huawei Device USA Inc. et al., No. 2:16-cv-00437-JRG-RSP, 2017 U.S. Dist. LEXIS 108040 (E.D. Tex. July 12, 2017) (“Huawei”), Semcon IP Inc. v. Amazon.com, Inc., No. 2:18-cv-00192-JRG, 2019 U.S. Dist. LEXIS 79846 (E.D. Tex. May 13, 2019) (“Amazon.com”), and Semcon IP Inc. v. ASUSTeK Computer, Inc., No. 2:18-cv-00193-JRG, 2019 U.S. Dist. LEXIS 114957 (E.D. Tex. July 10, 2019) (“ASUSTeK”). Nearly all the terms now before the Court were construed in Huawei, Amazon.com, or ASUSTek.

The Asserted Patents are generally directed to technology for managing a computer system’s power consumption by dynamically adjusting the processor’s operating frequency and voltage. The technology of the patents may be generally understood with reference to Figure 1 of the ’061 Patent, produced below and annotated by the Court. A frequency generator (17) receives an external or “slow” clock (green) and from that generates a processor or “core” clock (purple) for operating the processor’s processing unit (16). The generator (17) also provides other clocks for various system-memory and other components. ’061 Patent col.3 ll.18–26. As shown in the figure, a voltage generator (12) that is connected to a power supply (13) provides a voltage (blue) to the processor’s processing unit 16. See id. at col.2 ll.46–57. The processor’s power consumption and operability are related to the voltage and core-clock frequency. See, e.g., id. at col.1 11.39-47, col.7 11.39-60.

cick Memory/interface clo Clock generator \ Programmable 11 frequency System enerator memory (PLL) 14 17 Programmable Core generator 13 12 |v. Processing unit 16 CT Master VoltCom Registers Silicon speed Temperature Operating conditions 48 Circuit board 15

The abstracts of the Asserted Patents are identical and provide as follows: A method for controlling the power used by a computer including the steps of measuring the operating characteristics of a central processor of the computer, determining when the operating characteristics of the central processor are significantly different than required by the operations being conducted, and changing the operating characteristics of the central processor to a level commensurate with the operations being conducted. Claims 1 and 17 of the ’247 Patent, exemplary method and system claims respectively, provide: 1. A method, comprising: determining a level of permitted power consumption by a processing device from a set of operating conditions of the processing device, with the determining the level of permitted power consumption not based upon instructions to be executed by the processing device; determining a highest allowable frequency of operation of the processing device that would result in power consumption not exceeding the level of permitted power consumption; determining a lowest allowable level of voltage to apply to the processing device that would allow execution of the instructions by the processing device at the highest allowable frequency; and

changing power consumption of the processing device during execution of the instructions by reducing a magnitude of a difference between an operating frequency of the processing device and the highest allowable frequency of operation of the processing device and reducing a magnitude of a difference between a voltage applied to the processing device and the lowest allowable level of voltage. 17.

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Semcon IP Inc. v. Kyocera Corporation, (E.D. Tex. 2019).

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