Polaris Innovations Limited v. Advanced Micro Devices, Inc.
Opinion
NOTE: This disposition is nonprecedential.
United States Court of Appeals for the Federal Circuit
POLARIS INNOVATIONS LIMITED, Appellant
v.
ADVANCED MICRO DEVICES, INC., Cross-Appellant
2021-1917, 2021-1958
Appeals from the United States Patent and Trademark Office, Patent Trial and Appeal Board in No. IPR2019- 01527.
Decided: July 18, 2022
ROBERT E. FREITAS, Freitas & Weinberg LLP, Redwood Shores, CA, argued for appellant.
AASHISH G. KAPADIA, Baker Botts L.L.P., Austin, TX, argued for cross-appellant. Also represented by BRIAN W. OAKS; MICHAEL HAWES, Houston, TX.
Before MOORE, Chief Judge, PROST and HUGHES, Circuit Judges.
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PROST, Circuit Judge.
Advanced Micro Devices, Inc. (“AMD”) petitioned for inter partes review (“IPR”) of claims 1–3, 5, 9–15, 17, and 21–25 of U.S. Patent No. 8,117,526 (“the ’526 patent”), which Polaris Innovations Ltd. (“Polaris”) owns. In a final written decision, the Patent Trial and Appeal Board (“Board”) concluded that AMD had proved unpatentable only claims 1, 9, 12, 24, and 25. Advanced Micro Devices, Inc. v. Polaris Innovations Ltd., No. IPR2019-01527, Paper 28 (P.T.A.B. Feb. 26, 2021) (“Final Written Decision”). Each party appeals aspects of the decision adverse to it. We affirm in part and dismiss in part.
DISCUSSION
We first address the merits of Polaris’s appeal. We then consider whether aspects of AMD’s cross-appeal are improperly before us and whether AMD has standing before turning to the merits of the cross-appeal.
I
Polaris limits its challenges on appeal to claim 9, raising three arguments. It first contends that the Board erred in construing “checksum” to include simple parity bits calculated across disjoint inputs. Second, it argues that substantial evidence does not support the Board’s obviousness determination, even under the Board’s construction of “checksum.” And third, it suggests that the Board violated the Administrative Procedure Act (“APA”) by relying on a prior-art reference for its construction of “checksum” that neither party raised and to which Polaris never had an opportunity to respond. We consider each argument in turn and conclude that none has merit.
We start with Polaris’s challenge to the Board’s construction of “checksum.” AMD asked the Board to construe “checksum” to mean “a plurality of ECC [error correction code] bits.” Final Written Decision, at 13. Polaris disagreed , arguing that “checksum” “encompasses a multi-bit
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error detection or correction data structure whose bits are calculated using non-disjoint sets of inputs.” Id. But Polaris also sought to exclude from the construction “a set of simple parity bits, calculated from non-overlapping sets of inputs.” Id. at 16. The Board rejected both parties’ attempts to limit the scope of the term, concluding that “checksum” encompasses ECC bits but is not limited to them and that it includes a set of simple parity bits calculated from non-overlapping sets of inputs. Id. at 18. On appeal, Polaris contends that this construction ignores the ’526 patent’s teachings that checksums and simple parity bits are distinct concepts with distinct applications. 1 The problem with this argument is twofold. First, the fact that checksums and simple parity bits are distinct concepts does not, as Polaris seems to suggest, preclude the Board’s construction , in which checksums encompass simple parity bits but are not coextensive with them. See Appellant’s Br. 21–23. Second, nothing in the ’526 patent’s specification supports the narrowing limitation Polaris urges. As Polaris’s counsel conceded at oral argument, the specification and claims both state that checksums encompass
1 Polaris also suggests that it was inappropriate for the Board to resort to extrinsic evidence to construe “checksum ” after concluding that the inventor had acted as his own lexicographer in the ’526 patent. Appellant’s Br. 24–25. But the case Polaris cites, Multiform Desiccants, Inc. v. Medzam, Ltd., simply says that if the specification makes the meaning of a claim term sufficiently clear, that meaning shall apply. See 133 F.3d 1473, 1477 (Fed. Cir. 1998). So it does not support a categorical rule that one cannot consult extrinsic evidence when the inventor acts as his own lexicographer. And, in any event, the Board did not resort to extrinsic evidence to construe checksum; rather , it explained why the extrinsic evidence Polaris relied on was inconsistent with the specification. See Final Written Decision, at 16–18.
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error-correcting bits, and such bits can be calculated from overlapping and non-overlapping sets of inputs. Oral Arg. at 5:38–8:35, No. 21-1917, https://oralarguments .cafc.uscourts.gov/default.aspx?fl=21-1917_0705202 2.mp3. We therefore conclude that the Board’s construction was correct.
We turn next to Polaris’s contention that the Board’s obviousness analysis never addressed whether the prior art discloses a “checksum [determined] based on the data bits and the first and second indicators.” Polaris says that the Board mistakenly observed that Polaris never addressed any element of claim 9 other than “checksum.” We disagree. The full context of Board’s analysis shows that it considered all of Polaris’s arguments and that, in saying that Polaris had not addressed any other claim element besides “checksum,” it was talking about the “checksum [determined ] based on the data bits and the first and second indicators.” The Board first refers to Polaris’s arguments relating to “the required ‘checksum,’” and a review of the underlying citations shows that the arguments the Board was referencing include Polaris’s arguments relating to the “checksum [determined] based on the data bits and the first and second indicators.” See Final Written Decision, at 55 (citing J.A. 892–95 (Patent Owner Resp. 51–54) and 977–79 (Przybylski Decl. ¶¶ 165, 168–70)). The Board then observed that it had “review[ed] the record” and “confirm [ed AMD]’s analysis of the remaining requirements of claim 9,” reaffirming that it had considered the entire record and concluded that AMD had met its burden of proof. See Final Written Decision, at 57. These two statements indicate that the Board considered and rejected Polaris’s arguments on this limitation, and Polaris has not otherwise articulated why the Board’s conclusion is unsupported by substantial evidence.
We conclude our discussion of Polaris’s appeal with its argument that the Board violated the APA by relying on a prior-art reference that neither party had cited to construe
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“checksum.” Specifically, Polaris says that the Board relied on a reference, Maxino, that AMD had cited only in its invalidity discussion, not in the claim-construction context. As a result, Polaris contends, it had no opportunity to respond to the Board’s novel theory. But the Board did not rely on Maxino to construe “checksum.” Rather, the Board merely observed, using a “see also” citation, that Maxino was consistent with the idea that a checksum encompasses simple parity bits calculated from non-overlapping sets of inputs, a conclusion that the Board reached independently of Maxino’s disclosure. See Final Written Decision, at 16–17. We see no APA violation in the Board’s use of Maxino in this manner.
Seeing no merit in Polaris’s arguments, we affirm the Board’s determination that claim 9 of the ’526 patent is unpatentable as obvious.
II
A
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