Mosaid Technologies Inc. v. Samsung Electronics Co.

362 F. Supp. 2d 526, 2005 U.S. Dist. LEXIS 6071, 2005 WL 737524

• Court: District Court, D. New Jersey
• Decided: April 1, 2005
• Docket: 01-CV-4340(WJM), 03-CV-4698(WJM)
• Status: Published

Opinion

OPINION

MARTINI, District Judge.

TABLE OF CONTENTS

INTRODUCTION.531

BACKGROUND.531

SUMMARY JUDGMENT STANDARD.532

DISCUSSION. S3 2

I. INFRINGEMENT. Ü1 CO to

A. Claim 15 of the Lines ’643 Patent. Ü1 CO CO

1. Direct Versus Indirect Infringement. Ol CO CO

2. The “Latching” Limitation. Ü1 CO ^

3. The “Control Signals Applying” Limitation OI CO 05

B. Claim 1 of the Foss ’654 patent. CJl CO 05

1. The “Switching Circuit ... Alternating the Level” Limitation and the Clock Sources Disclaimer. cti CO <1

2. The “Second Switch” Limitation. cn O

3. The “Clock Signal” Limitation. cn ^ O

C. Claims 1 and 10 of the Foss ’201 Patent and the “Switching Means” Limitation . Ol h- 1

D. Infringement Under The Doctrine Of Equivalents. C7T to

II. INVALIDITY.

A. Anticipation: § 102(b) “On Sale” Bar.

B. Anticipation: § 102(g) “Prior Invention” Bar.

1. TI Design.

2. Micron 4M DRAM.

C. Anticipation: § 102(b) “Printed Publication” Bar.

1. Fujii.

2. Kajigaya.

3. Yanagisawa.

4. Harmon, Holbrook, Horiguchi and Rosenthal.

III. UNENFORCEABILITY. T — I ID

A. Prosecution Laches . tH to

B. Inequitable Conduct. CO iO

IV. MARKING.555

V. MOTION TO STRIKE .558

CONCLUSION. .559

INTRODUCTION

This matter comes before the Court on the parties’ motions for summary judgment. MOSAID Technologies Inc. (“MO-SAID”) seeks summary judgment of infringement as to claim 15 of the Lines ’643 patent and claim 1 of the Foss ’654 patent, and on several of Infineon Technologies North America Corp. et al’s (“Infineon’s”) invalidity and unenforceability defenses, including invalidity under §§ 102(b) and (g), prosecution laches, and inequitable conduct. Infineon seeks summary judgment of noninfringement as to all of the asserted Lines and Foss claims, and on its claim that MOSAID’s potential damages are limited under the patent marking statute. Also before the Court is MOSAID’s motion to strike the Rebuttal Expert Report of Joseph McAlexander Regarding Non-Infringement of MOSAID Patents or, in the alternative, for leave to supplement the expert report of David Taylor. For the following reasons, the parties’ motions for summary judgment are GRANTED-IN-PART and DENIED-IN-PART, and MOSAID’s motion to strike is DENIED in its entirety.

BACKGROUND

This is a patent infringement action. Currently, MOSAID asserts that Infineon infringes seven patents. Those patents can be broken down into two families named after the lead inventors: the Lines patent family and the Foss patent family. The asserted Lines patents are U.S. Patent Nos. 5,822,253 (the “’253 patent”), 5,751,643 (the “’643 patent”), 6,278,640 (the “ ’640 patent”), and 6,603,703 (the “ ’703 patent”). The asserted Foss patents are U.S. Patent Nos. 5,828,620 (the “ ’620 patent”), 6,055,201 (the “ ’201 patent”), and 6,580,654 (the “ ’654 patent”). Both families claim particular circuits found in a DRAM chip; the Lines patents claim a word line driver circuit and the Foss patents claim a voltage pump circuit. 1

This litigation began when Infineon filed a declaratory judgment patent action against MOSAID in the U.S. District Court for the Northern District of California. Aware that MOSAID had already filed a patent infringement action against Samsung Electronics Co. et al. (“Samsung”) in this district, Infineon sought to consolidate the two cases as a multidistrict litigation in the California court. The Judicial Panel on Multidistrict Litigation agreed that it should be consolidated, but found that the District of New Jersey was the more appropriate court to conduct all pretrial proceedings. Accordingly, the In-fineon action was transferred to this Court where it was consolidated with the Samsung action. 2

The only pretrial proceeding that remains to be completed is resolution of the pending summary judgment motions and MOSAID’s motion to strike. This Court has conducted Markman proceedings and issued a Markman Opinion. The parties have completed fact and expert discovery. Once these motions are resolved, it will then be appropriate for the Infineon action to be transferred back to the Northern District of California.

SUMMARY JUDGMENT STANDARD

Patent cases are amenable to summary judgment. Knoll Pharm. Co. v. Teva Pharm. USA, Inc., 367 F.3d 1381, 1384 (Fed.Cir.2004). Summary judgment eliminates unfounded claims without resorting to a costly and lengthy trial. Celotex Corp. v. Catrett, 477 U.S. 317, 327, 106 S.Ct. 2548, 91 L.Ed.2d 265 (1986). However, a court should grant summary judgment only “if the pleadings, depositions, answers to interrogatories, and admissions on file, together with the affidavits, if any, show that there is no genuine issue as to any material fact and that the moving party is entitled to judgment as a matter of law.” Fed.R.Civ.P. 56(c). The burden of showing that no genuine issue of material fact exists rests initially on the moving party. Celotex, 477 U.S. at 323, 106 S.Ct. 2548. A litigant may discharge this burden by exposing “the absence of evidence to support the nonmoving party’s case.” Id. at 325, 106 S.Ct. 2548. In evaluating a summary judgment motion, a court must view all evidence in the light most favorable to the nonmoving party. Matsushita Elec. Indus. Co. v. Zenith Radio Corp., 475 U.S. 574, 587, 106 S.Ct. 1348, 89 L.Ed.2d 538 (1986); Goodman v. Mead Johnson & Co., 534 F.2d 566, 573 (3d Cir.1976).

Once the moving party has made a properly supported motion for summary judgment, the burden shifts to the nonmoving party to “set forth specific facts showing that there is a genuine issue for trial.” Fed.R.Civ.P. 56(e); Anderson v. Liberty Lobby, Inc., 477 U.S. 242, 247-48, 106 S.Ct. 2505, 91 L.Ed.2d 202 (1986). The substantive law determines which facts are material. Anderson, 477 U.S. at 248, 106 S.Ct. 2505. “Only disputes over facts that might affect the outcome of the suit under the governing law will properly preclude the entry of summary judgment.” Id. No issue for trial exists unless the nonmoving party can demonstrate sufficient evidence favoring it such that a reasonable jury could return a verdict in that party’s favor. Id. at 249, 106 S.Ct. 2505; Knoll Pharm. Co., 367 F.3d at 1384.

DISCUSSION

I. INFRINGEMENT

MOSAID seeks summary judgment that Infineon’s 256 RLDRAM Blaze (“Blaze”) products infringe claim 15 of the Lines ’643 patent and that Infineon’s 256M Harteras (“Harteras”) products infringe claim 1 of the Foss ’654 patent. Infineon seeks summary judgment that the accused products do not infringe any of the asserted Lines claims that contain a “latching” limitation, any of the asserted Foss patents because of the “clock source” disclaimer, or claims 1 and 10 of the Foss ’201 patent because of the “switching means” limitation. Infineon also seeks summary judgment that MOSAID cannot demonstrate infringement under the doctrine of equivalents for any asserted claim of the patents in suit. Because of the substantial overlap among these arguments, the Court will address them together by issue.

Infringement is a two-step process: the Court must construe the disputed terms contained in the asserted claims, and then compare the asserted claims as construed to the accused products or processes. NTP, Inc. v. Research in Motion, Ltd., 392 F.3d 1336, 1364 (Fed.Cir.2004). Because the Court has already completed the first step by construing the disputed claim terms in its Markman Opinion and Order, the Court now turns to the second step.

To prove infringement, the patentee must show that the accused products or processes contain each and every limitation of the asserted claims, either literally or under the doctrine of equivalents. Frank’s Casing Crew & Rental Tools, Inc. v. Weatherford Int’l, Inc., 389 F.3d 1370, 1378 (Fed.Cir.2004). A product or process literally contains a limitation when it contains the limitation exactly. Litton Sys., Inc. v. Honeywell, Inc., 140 F.3d 1449, 1454 (Fed.Cir.1998). If the limitation is not met exactly, it may still be infringed under the doctrine of equivalents. A product or process infringes a limitation under the doctrine of equivalents when some element of the product or process is not substantially different from the limitation (the “insubstantial differences” test), 3 or performs substantially the same function in substantially the same way to obtain substantially the same result as that limitation (the “function-way-result” test). Lear Siegler, Inc. v. Sealy Mattress Co. of Mick, Inc., 873 F.2d 1422, 1425 (Fed.Cir.1989).

A. Claim IS of the Lines ’643 Patent

Claim 15 of the Lines ’643 patent states: A method of selecting a word line in a dynamic random access memory comprising:

decoding address signals to drive first and second level shifted control signals to logic levels including a voltage level greater than the voltage to be stored in a memory cell and latching the level-shifted control signals, each control signal in a respective latch state being pulled down to a low level through an N-channel transistor as the other control signal is latched high through a P-channel pull-up transistor, the control signal being set and reset by pull-down transistors gated only by Vdd level signals; and

from one of the latched, level-shifted control signals applying a controlled high voltage greater than the stored voltage to a selected word line.

’643 patent, claim 15 (emphasis added). Infineon argues that the accused products do not infringe claim 15 because they do not meet the two italicized limitations. MOSAID disagrees, arguing that both limitations are satisfied by Infineon’s accused products.

1. Direct Versus Indirect Infringement

As an initial matter, it is important to address Infineon’s argument that MO-SAID’s motion for summary judgment of infringement should be denied because MOSAID has failed to proffer evidence that Infineon actually practices the method of claim 15. (Infineon’s Mem. In Opp’n to MOSAID’s Motions for Summ. J. Against Infineon (“Infineon’s Opp’n Br.”) at 2-3). MOSAID essentially admits as much, but responds by arguing that Infineon has induced others to infringe and has contributed to their infringement by selling in the United States DRAM products that perform the claimed method. See 35 U.S.C. §§ 271(b) (induced infringement) and (c) (contributory infringement). Since this lawsuit appears to be based on Infineon’s sales of allegedly infringing DRAM chips in the United States, and MOSAID has not shown that Infineon practices the claimed method in the United States, the Court finds that Infineon does not directly infringe claim 15. Infineon, however, remains potentially liable for indirectly infringing claim 15.

2. The “Latching” Limitation

The asserted claims of the Lines ’253, ’643 and ’640 patents contain a “latching” limitation. 4 Claim 15 of the ’643 patent is a representative claim. As set forth above, it requires that the level-shifted control signals be “latched.” Infineon argues that none of the accused products “latch” the level-shifted control signals under the Court’s construction of that term in the Markman Opinion and Order. MO-SAID disagrees. MOSAID argues that Infineon misunderstands the construction of the “latching” limitation and that, if properly applied to the accused products, they infringe literally or under the doctrine of equivalents.

In determining whether Infineon’s accused products “latch” the control signals, the issue boils down to what it means to “latch” the control signals. Although the Court believes that this was clearly delineated in its Markman Opinion and Order, both parties argue that the Court’s construction of “latch” supports their infringement argument.

The Court defined “to ... latch” as meaning “to indefinitely retain at least one data state with a feedback loop in the absence of any new control signal to change the state.” (Markman Order at ¶ 22). MOSAID argues that this construction does not mean that the output state should be retained in the absence of inputs or “without input signals.” Instead, it argues that the Court’s construction “only requires maintaining at least one data state until a new signal changes the state.” (MOSAID’s Br. in Opp’n to Infineon’s Motion for Summ. J. (“MOSAID’s Opp’n Br.”) at 8). As a result, it argues that cross-coupled PMOS transistors, such as p5 and p6 in Figure 1 of the ’643 patent, are capable of “latching” control signals as defined by the Court.

MOSAID’s take on the Court’s claim construction is incorrect. Essentially, MOSAID contorts the construction of “latching” in an attempt to reclaim a construction that was previously rejected by this Court. In doing so, it ignores the clear language of the Court’s Markman Opinion, which contradicts MOSAID’s current position.

Previously, MOSAID contended that a “latching level shifter” holds the output signals while the input signals are present. (Markman Op. at 43-44). In an effort to persuade the Court that its proposed definition was correct, MOSAID argued that the dictionary definition of “latch,” which referred to a symmetrical circuit, was inapplicable to this case because Figure 1 does not use a symmetrical latching level shifter; instead, it uses an asymmetrical latching level shifter. In other words, MOSAID acknowledged that Figure 1 was not capable of “two-way latching” under the ordinary meaning of the word “latch.” MOSAID argued that Figure 1 shows an asymmetrical circuit capable of only “one-way latching” because it can only hold one output state in the absence of inputs. MO-SAID contended that in order for Figure 1 to retain both output states, it would need another pull-down transistor, like transistor 12, whose gate is connected to node 8B.

Indeed, MOSAID’s own expert, Richard Greene, stated the following when explaining what a DRAM designer in 1990 would have understood the term “level shifter” to mean:

Generally, a “latch” is understood to refer to a circuit that retains its output state in the absence of inputs. In contrast, the level shifter 6 shown in Figure 1 does not retain its output state in the absence of inputs. Rather, the level shifter 6 can not retain state because it only has one pull-down transistor 12 connected to the gate of one of the pullup trapsistors 7B. In order to retain a logic zero, another pull-down transistor connected to the gate of transistor 7A would be required.

(Expert Report of Richard Greene in Support of MOSAID’s Claim Construction Br. (“Greene Mark-man Expert Report”) at ¶ 18, emphasis added).

In the Mark-man Opinion, the Court agreed with MOSAID’s understanding of Figure 1. It determined that transistor 12 was an essential element needed to “latch” an output state and that the absence of a second pull-down transistor prevented Figure 1 from performing “two-way latching.” The Court found that the latching level shifter of Figure 1 of the Lines patents can only retain one output state in the absence of input signals. (.Mark-man Op. at 44). Relying in part on MOSAID’s own expert’s definition of “latch,” the Court concluded that “latching” means “retaining an output state in the absence of inputs,” ie., retaining an output state without any input signals. (Mark-man Op. at 44 n. 20). This construction reflected the Court’s view of how Figure 1 of the Lines patents works.

In direct contrast to that construction, MOSAID’s current infringement argument is predicated on the assertion that transistor 12 is not needed for latching. Indeed, MOSAID goes so far as to say that transistor 12 is “irrelevant” to latching, 5 and is but a “distraction, not a defense.” 6 Instead, MOSAID argues that Infineon’s Blaze “latches” the control signals by maintaining the inputs to the level shifter. (See, e.g., MOSAID’s Br. Against Infineon at 8; Expert Report of David L. Taylor Regarding Infringement of the Accused Infineon Products (“Taylor Infr. Report”) at • ¶ 127). But that argument cannot be correct. If MOSAID’s infringement argument was adopted, it would mean that Figure 1 performs “two-way latching” rather than only “one-way latching.” In other words, MOSAID artfully twists the Court’s claim construction until it achieves the same result it attempted to achieve under its proposed Mark-man construction. 7 Having rejected that proposition once, the Court readily and easily rejects the repackaged “latching” argument a second time. Consequently, because “latching” is not dependent on input signals being maintained, MOSAID’s motion for summary judgment of infringement as to claim 15 of the ’643 patent is denied.

Given the correct construction of the relevant claim terms — that “latching” must be performed in the absence of input signals 8 — it is apparent that the only way to indefinitely retain a data state is to use a pull-down transistor such as transistor 12. To latch each control signal, the latching level shifter requires two pull-down transistors or other structure that performs that function. Here, there is no dispute that the level shifters in Infineon’s accused products cannot indefinitely retain data states in the absence of inputs; they do not contain the requisite pull-down transistors. Thus, the accused products do not literally meet the “latching” limitation. Additionally, because MOSAID has failed to identify any other structure that can “latch” the control signals as defined by the Court, the accused products do not infringe the “latching” limitation under the doctrine of equivalents. Accordingly, the accused products do not infringe claims 31-34 of the ’253 patent, claims 1-3, 8-13, 15-17, and 22-28 of the ’643 patent, and claim 1 of the ’640 patent, either literally or under the doctrine of equivalents.

3. The “Control Signals Applying” Limitation

MOSAID argues that Infineon’s Blaze infringes the “control signals applying” limitation of claim 15 of the Lines ’643 patent because Blaze’s level shifter generates control signals that select a block of word lines, one of which is eventually selected by a primary and secondary decoder. Infineon argues that Blaze does not infringe this limitation because the signals identified by MOSAID are not control signals, ie., they do not control the application of a voltage to a single word line or group of word lines.

“Control signals” have been defined as meaning “signals used to control the application of a voltage to a single word line or a group of word lines.” (Markman Order at ¶ 18). In the context of the claim language set forth above, the control signal applies VpP to a selected word line. See ’643 patent, claim 15. Here, MOSAID admits that Infineon’s control signal only applies VpP to a block of word lines, not a selected word line or even a group of word lines. (See MOSAID’s Br. Against Infi-neon at 11-12). Once that block of word lines is selected, a primary and secondary decoder must then go on to select the appropriate word line or group of word lines. Since the signals identified by MO-SAID do not apply Vpp to a selected word line, but are further upstream from the actual selection of the word line, those signals cannot be “control signals” as claimed by the patent. Therefore, Infi-neon’s Blaze does not literally infringe the “control signals applying” limitation.

B. Claim 1 of the Foss ’654 patent

Claim 1 of the Foss ’654 patent states: A dynamic random access memory (DRAM) boosted voltage word line supply comprising:

DC voltage supply;

a boosting capacitor having first and second terminals; and

a switching circuit including a first switch between the voltage supply and the first terminal of the boosting capacitor and a [1] second switch between the first terminal of the boosting capacitor and a capacitive load, the [2] first switch and the second switch being driven by clock signals, the [3] switching circuit alternately connecting the first terminal of the boosting capacitor to a first voltage level and to the capacitive load while alternating the level of voltage applied to the second terminal of the boosting capacitor to pump the voltage on the capacitive load to a boosted voltage level greater than and of the same polarity as the DC voltage supply, the second switch being enabled to substantially eliminate a threshold voltage reduction of boosted voltage; and

a word line decoder which selectively couples the boosted voltage level to a selected DRAM word line.

’654 patent, claim 1 (emphasis added). 9 MOSAID argues that Infineon’s Hatteras infringes this claim. Infineon disagrees. Infineon argues that the accused products, including Hatteras, do not infringe any of the Foss patents because they fall within the clock sources disclaimer and therefore cannot meet limitation [3] designated above. Further, Infineon argues that Hatteras does not meet limitations [1] and [2] listed above.

1. The “Switching Circuit ... Alternating the Level” Limitation and the Clock Sources Disclaimer

Infineon moves for summary judgment that its accused products do not infringe any of the asserted claims of the Foss ’620, ’201 and ’654 patents. Each of these claims contains a “switching circuit ... alternating the level of voltage applied to the second terminal of the boosting capacitor” limitation. 10 Infineon argues that its accused products do not infringe that limitation because they use a “clock source” to charge the second terminal of the boosting capacitor, and thus falls within the clock sources disclaimer. MOSAID responds by arguing that the accused products use a local “clock signal,” not a “clock source,” to charge the second terminal, which is fundamentally different and meets this limitation. In order to resolve this dispute, it is necessary for the Court to explicate what it means to use a “clock source” to charge a boosting capacitor.

The Court construed “switching circuit ... alternating the level” to mean “alternately connecting the second terminal of the boosting capacitor ... without the use of clock sources to charge the boosting capacitor." (.Markman Order at ¶ 26, emphasis added). This clock sources disclaimer applies to all of the Foss patents. (.Markman Op. at 52-55). Figure 1 of the Foss patents is a drawing of a prior art circuit that used clock sources to charge the boosting capacitor. {See, e.g., Foss 30(b)(6) Dep. at 121:21-122:6).

Infineon argues that the accused products work the same way as the prior art depicted in Figure 1. Although Infineon’s products use intervening circuitry, including multiple inverters, charged by a “clock source” to supply the charge to the second terminal of the boosting capacitor, Infi-neon asserts that its products are no different than the prior art. According to Infineon, the inclusion of additional intervening circuitry does not alter the “clock source” in a meaningful way — the charge applied to the second terminal of the boosting capacitor remains a “clock source.” Since the Foss patents disclaimed the use of a “clock source” to charge the boosting capacitor, Infineon argues that Hatteras and the other accused products do not infringe the asserted Foss claims.

MOSAID responds by arguing that the accused products charge the boosting capacitor from local “clock signals,” not “clock sources.” MOSAID argues that Infi-neon misinterprets the phrase “clock sources” to include “clock signals.” According to MOSAID, these are two different and distinct concepts. MOSAID argues that a “clock signal” is a voltage, whereas a “clock source” is structure, ie., a circuit, which in the Foss patents refers only to the “master clock source,” a circuit responsible for establishing the overall timing of all local “clock signals.”

One problem with MOSAID’s argument is that the Foss patents’ specifications use the terms “clock sources” and “clock signals” interchangeably. 11 See, e.g., ’654 patent at 1:40-42; 1:51-58; 4:28-41; 5:24-30; 6:30-32. One conspicuous example of how the terms are used interchangeably to refer to a voltage is:

Clock sources are applied to the gates of the various transistors as follows: <£>! to the gate of transistor 25, /§>1 to the gate of transistor 20, 3>2 to the gate of transistor 21, and /<3>2 to the gate of transistor 26.

Boosted clock signals are applied to the gates of the various transistors as follows: + to the gate of transistor 23, Abj to the gate of transistor 18, <E>2 + to the gate of transistor 17 and /<J>2+ to the gate of transistor 24.

’654 patent, col. 4:11-19 (emphasis added). That excerpt, which describes Figure 3 of the Foss patents, illustrates that “clock sources,” at least some of the time, may include “clock signals.” Dr. Richard Foss, the first named inventor on the Foss patents, agrees with this position, having testified that there is no meaningful difference between a “clock source” applied to an inverter and its “clock signal” output. {See Foss 30(b)(6) Dep. at 125:15-19).

Another problem with MOSAID’s argument is that the patent disclaims the use of any “clock source,” not just a “master clock source.” Under MOSAID’s definition of “clock source,” there can be only one. However, that definition would exclude the embodiment depicted in Figure 1 and the “clock sources” used to charge boosting capacitors 9 and 11 because the Foss specifications clearly state that there are two different clock sources. See, e.g., ’654 patent, 1:40-42 (referring to one clock source and then “another clock source”). Because MOSAID’s proposed construction of “clock sources” does not comport with the patents themselves, it must be rejected. 12

MOSAID tries to differentiate between the accused products and the prior art circuit shown in Figure 1 by arguing that the inverters shown in Figure 1 “represent the output stage of the oscillator clock source, and therefore the clock source output stage directly supplies charge to capacitors 9, 11,” 13 whereas the inverters in Infineon’s products are not part of the actual “clock source,” and therefore the “clock source” output is not directly supplied to the boosting capacitor. MO-SAID’s distinction, however, is unsupported and based solely on attorney argument. Contrary to MOSAID’s argument that inverters 8 and 10 are part of the “clock source,” the specification clearly states that the clock sources are connected through the inverters, i.e., the outputs of the clock sources are applied to the inverters, which in turn output the signals to the second terminal. See ’654 patent 1:51-53 (“A clock source is connected through an inverter 8 and via capacitor 9 to node 4, and another clock source is connected through an inverter 10 through capacitor 11 to node 8.”) and 6:30-32 (“[T]he prior art pump [Figure 1, which includes the inverters,] ... is driven by an oscillator 40, which provides clock signals, e.g., 3>1; <J>2, /<3?i and /<I>2”).

This description of how the clock source is applied to the second terminal comports with an inventor’s deposition testimony. Testifying as a 30(b)(6) witness, Dr. Foss stated in relevant part:

Q. And the output of the ring oscillator [, ie., the clock source,] is the input to inverters eight and ten.

A. That is the presumption, yes.

Q. And the difference between phi 1 and phi 2 and input to inverters eight and ten is that it’s the same as phi 1 and phi 2 but in undelayed and unamplified form, right?

A. Undelayed and unamplified form, yes.

(Foss 30(b)(6) Dep. at 125:7-19).

In sum, the patentees used “clock signal” and “clock source” interchangeably. As a result, MOSAID’s attempt to argue that the second terminal of the boosting capacitor in Infineon’s accused products charge from a local “clock signal” rather than a “clock source” is inapt. There is no dispute that in the accused products, like the prior art, a “clock source” is supplied through an inverter to charge the second terminal of the boosting capacitor. Accordingly, the undisputed facts demonstrate that Hatteras and the other accused products use a “clock source” to charge the boosting capacitor, falling squarely within the clock source disclaimer. As a result, the accused products do not literally infringe claims 1-3, 5-9, 13-15, 17-21, and 24 of the ’620 patent, claims 1, 10-11, and 20 of the ’201 patent, and claims 1, 3-4 and 6 of the ’654 patent.

MOSAID argues in the alternative that even if the accused products do not meet this limitation literally, they meet it under the doctrine of equivalents. MO-SAID, however, is wrong. Having disclaimed the use of clock sources to charge the boosting capacitor, MOSAID cannot use the doctrine of equivalents to recapture that which it specifically excluded from the claims. Festo Corp. v. Shoketsu Kinzoku Kogyo Kabushiki Co., 344 F.3d 1359, 1378 (Fed.Cir.2003) (“The patentee cannot reach, through equivalency, that which was disclaimed in order to obtain the patent.”); SciMed Life Sys., Inc. v. Advanced Cardiovascular Sys., Inc., 242 F.3d 1337, 1345 (Fed.Cir.2001) (“Having specifically identified, criticized, and disclaimed the [accused structure], the paten-tee cannot now invoke the doctrine of equivalents to ‘embrace a structure that was specifically excluded from the claims.’ ”) (quoting Dolly, Inc. v. Spalding & Evenflo Cos., 16 F.3d 394, 400 (Fed.Cir.1994)). Consequently, the accused products do not infringe the asserted Foss claims, either literally or under the doctrine of equivalents.

2. The “Second Switch” Limitation

MOSAID moves for summary judgment that Hatteras contains a circuit that satisfies the “second switch” limitation of the ’654 patent — “a second switch between the first terminal of the boosting capacitor and a capacitive load.” 14 The parties designate the circuit in question as “S2.” Infineon argues that Hatteras does not infringe the “second switch” limitation because S2 is not a “switch” as that term has been defined by the Court.

“Switch” has been defined as “a device for making, breaking, or changing the connection of a circuit, but not a transistor introducing a threshold voltage drop or a transistor configured as a diode.” (Mark-man Order at ¶ 39, emphasis added). Infi-neon, relying on its noninfringement expert’s opinion, argues that S2 is not a switch because it introduces a threshold voltage drop and is configured as a diode. (Rebuttal Expert Report of Joseph C. McAlexander Regarding Non-Infringement of MOSAID Patents (“McAlexan-der’s Noninfr. Report”) at 181). However, in reaching that conclusion, Infineon’s expert relies on simulations that appear not to be before the Court and there is no explanation how they were run, on what Infineon parts they were run, and what the results were.

MOSAID on the other hand argues, and appears to support its argument, that there is no threshold voltage loss because S2 is over-driven. (See Suppl. to Soder-man Infringement Report Dated Oct. 15, 2004 at ¶ 38). However, MOSAID does not appear to support its argument that S2 does not function as a diode during the relevant time period. Given this factual dispute as to whether S2 functions as a diode, the Court cannot resolve by summary judgment whether this claim limitation is met by Infineon’s Hatteras.

3. The “Clock Signal” Limitation

Infineon argues that even if Hatteras is found to contain a “second switch,” it does not infringe the “clock signal” limitation — “the first and the second switch being driven by clock signals” — because the signal that drives the alleged “second switch” is not a “clock signal.” According to Infineon, the “clock signal,” as defined by the Court, must be a digital signal. (See Infineon’s Opp’n Br. at 12-13). Because the signal applied to the gate of S2 is analog, not digital, Infineon argues Hatteras does not meet this limitation.

MOSAID argues that Hatteras meets the “clock signal” limitation. MOSAID contends that a “clock signal” is a “timing signal used to synchronize operation,” whether in analog or digital form. (MO-SAID’s Br. Against Infineon at 17).

The Court agrees with MOSAID. There is no dispute that the signal driving the gate of transistor S2 is a timing signal used to synchronize its operation. Although it may be analog in form, there is nothing in the specification or claims that would preclude a “clock signal” from including either form. Consequently, assuming arguendo Hatteras contains a “second switch,” the Court finds that Hatteras meets the “clock signal” limitation.

C. Claims 1 and 10 of the Foss ’201 Patent and the “Switching Means ” Limitation

Claims 1 and 10 include a “switching means” limitation. That limitation states:

[S]witching means including a first switch between one level of the voltage supply and the first terminal of the boosting capacitor and a second switch between the first terminal of the boosting capacitor and a capacitive load, the first and second switches being driven by clock signals, the switching means alternately connecting the first terminal of the boosting capacitor to the voltage supply and to the capacitive load while alternating the level of the voltage supply connected to the second terminal of the boosting capacitor to pump the voltage on the capacitive load to a boosted voltage level greater than and of the same polarity as the DC voltage supply to provide a boosted voltage supply.

’201 patent, claims 1 and 10 (emphasis added).

“Switching means” was found to be a means-plus-function limitation under 35 U.S.C. § 112, ¶ 6. The Court identified transistors 23 and 24 as the structure specifically corresponding to the function of “alternately connecting.” (Markman Op. at 62). Transistor 23 is an NMOS transistor and transistor 24 is a PMOS transistor.

Infineon argues that its accused products do not infringe because they do not use a PMOS transistor to perform the function of “alternately connecting.” In lieu of a PMOS transistor, they use a fully-switched NMOS transistor.

MOSAID does not dispute this. Instead, it argues that whether Infineon’s products use an NMOS instead of a PMOS transistor is irrelevant for literal infringement purposes because the Court did not specify the type of transistors that correspond to the “switching means.” That argument is simply wrong. Paragraph 30 of the Markman Order specifically states that transistors 23 and 24 are the corresponding structure. Although transistor 24 is misidentified in Figure 3, MOSAID does not and cannot dispute that transistor 24 is a PMOS transistor. (See Foss 30(b)(6) Dep. at 128:2-11 (stating same)). Thus, MOSAID cannot possibly dispute that the Court identified a PMOS transistor as corresponding structure.

To determine literal infringement of a means-plus-function limitation, “the accused device [must] perform a function identical to that identified in the means'clause.” Ishida Co. v. Taylor, 221 F.3d 1310, 1316 (Fed.Cir.2000). If the accused structure “performs the identical function, an accused device literally infringes a claim [limitation] under § 112, ¶ 6 only if it is insubstantially different from the corresponding structure in the patent specification.” Id. at 1317. For a means-plus-function limitation, an accused device infringes under the doctrine of equivalents only if there is an “insubstantial difference” between the corresponding structure and any after-invented structure found in the accused device. Id.

Here, there is no dispute that the fully-switched NMOS transistor performs the identical function. Thus, the question of infringement hinges on whether that NMOS transistor is “insubstantially different” from the claimed PMOS transistor.

MOSAID asserts Infineon’s use of an NMOS transistor is insubstantially different from the corresponding structure. In-fineon counters this assertion by arguing that NMOS and PMOS transistors are not equivalent. For support, Infineon cites to the deposition testimony of Dr. Foss, who, testifying as a 30(b)(6) witness for MO-SAID, stated that PMOS and NMOS transistors work in significantly different ways and are not substitutes for each other. (See Foss 30(b)(6) Dep. at 225:11-226:14). Thus, by MOSAID’s own admission, there are more than insubstantial differences between the two types of transistors.

MOSAID asserts that the Foss testimony cited by Infineon concerns the Sanyo design, not a patent in suit. MOSAID is incorrect. It is clear from Dr. Foss’ testimony that the context of the discussion concerned the Foss ’201 patent, not the Sanyo design. (See id. at 224:3-225:10). Notably, MOSAID, who bears the burden of coming forward with evidence to show there is a genuine issue for trial, provides no evidence demonstrating that an NMOS transistor is insubstantially different from a PMOS transistor. Consequently, the Court finds that Infineon’s accused products do not literally infringe claims 1 and 10 of the ’201 patent. Additionally, because NMOS transistors existed at the time the Foss inventions were first conceived, and could not be considered an after-invented technology, the accused products do not infringe these claims under the doctrine of equivalents.

D. Infringement Under The Docti'ine Of Equivalents

Infineon moves for summary judgment that the limitations of the asserted claims of the patents in suit are not infringed under the doctrine of equivalents. Infi-neon argues that MOSAID proffers nothing more than conclusory allegations of equivalence rather than the particularized, limitation-by-limitation analysis required by Federal Circuit jurisprudence.

MOSAID argues that summary judgment should be denied for three reasons. First, it argues that at the summary judgment stage, it need not proffer a particularized, limitation-by-limitation analysis. Rather, it need only satisfy a minimal burden of proof as articulated in the Supreme Court case Wamer-Jenkinson, 15 Second, it argues that Infineon’s motion is premature because it was filed before expert depositions were taken and during those depositions MOSAID will have an opportunity to elicit testimony from its experts regarding infringement under the doctrine of equivalents. And third, MOSAID argues that it does offer particularized evidence of infringement under the doctrine of equivalents in the Declaration of David Taylor, 16 which was submitted in support of its opposition brief.

The Supreme Court in Wamer-Jenkinson articulated what may appear to be at first blush a relatively minimal burden that a patent holder must carry in order to survive a motion for summary judgment of noninfringement under the doctrine of equivalents. The Court stated: “Where the evidence is such that no reasonable jury could determine the elements to be equivalent, district courts are obligated to grant partial or complete summary judgment.” Warner-Jenkinson, 520 U.S. at 39 n. 8, 117 S.Ct. 1040 (emphasis added). However, contrary to MOSAID’s argument, the standard’s reference to “elements” expressly requires the patentee to proffer a limitation-by-limitation analysis. Otherwise, it would be impossible for the Court to determine whether the particular element in the accused device is equivalent to the claim limitation. Indeed, the Federal Circuit dispelled any doubt that a proffer of evidence pertaining to the invention as a whole is inadequate, when it stated: “Whether a claim is infringed under the doctrine of equivalents may be decided on summary judgment if no reasonable jury could determine that the limitation [of the claim] and the element [of the accused product] at issue are equivalent.” Zelinski v. Brunswick Corp., 185 F.3d 1311, 1317 (Fed.Cir.1999) (citing Warner-Jenkinson, 520 U.S. at 39 n. 8, 117 S.Ct. 1040). Thus, Wamer-Jenkinson and its progeny require the patent holder to proffer evidence of equivalence on a limitation-by-limitation basis.

Here, MOSAID has failed to satisfy that particularized showing. The expert reports that MOSAID relies on to demonstrate equivalence for Lines and Foss claims are inadequate. For example, the totality of Richard Greene’s 17 doctrine of equivalents analysis with regard to the ’654 patent states:

Based on the foregoing analysis, I conclude that each and every element or its equivalent of the above cited claims of the ’654 patent is contained in the relevant circuitry of the INFINEON 128M MOBRAM DD1B S17. It is therefore my expert opinion that the INFINEON 128M MOBRAM DD1B S17 infringes the following claims of the ’654 patent literally and under the doctrine of equivalents: Claims 1, 3, 4 and 6.

(Expert Report of Richard Greene at 54). David Taylor 18 also chose not to perform a limitation-by-limitation analysis in his expert report, stating:

In my opinion, the accused Infineon 256M RLDRAM DD1 (Blaze) memory product contains all of the elements of Claim 15 of the ’643 patent and therefore literally infringes that claim. Additionally, because the accused Infineon 256M RLDRAM DD1 (Blaze) product has substantially the same function, operates in substantially the same way, and produces substantially the same result as the claimed circuit, any differences between the circuits in the accused Infineon 256M RLDRAM DD1 (Blaze) memory product and claim 15 of the ’643 patent are insubstantial.

(Taylor Infr. Report at ¶ 130). In short, these reports either compare the invention as a whole to the asserted claims, which is legally improper under the doctrine of equivalents, 19 or merely regurgitate the doctrine of equivalents test without actually applying it to the limitation at issue.

MOSAID’s argument that the inadequacies of these expert reports can be shored up by posing questions to its own experts during expert depositions concerning their position on equivalency is incorrect. Under Rule 26(a)(2)(B), an expert “report shall contain a complete statement of all opinions to be expressed and the basis and reasons therefor.” Fed.R.Civ.P. 26(a)(2)(B) (emphasis added). Here, it is beyond contestation that MOSAID’s expert reports fail to explain how the asserted claims are infringed under the doctrine of equivalents. Accordingly, under Rule 26(a)(2)(B), MOSAID cannot elicit the experts’ bases for asserting equivalency when those bases have not been expressly set forth in their expert reports.

MOSAID’s argument that it carried its particularity burden through the Taylor declaration is also unavailing. This Court entered a scheduling order setting forth the schedule by which the parties would exchange expert reports. Affirmative expert reports concerning issues upon which the party bore the burden were due October 15, 2004. Because MOSAID is the patentee and bears the burden of proof on infringement, Taylor’s infringement expert report was due on October 15, 2004. Thus, as of that date, Taylor was required to set forth all of his opinions and bases for those opinions. See Fed.R.Civ.P. 26(a)(2)(C) (stating that disclosure of expert reports “shall be made at the times and in the sequence directed by the court”). However, the Taylor declaration MOSAID seeks to rely on was not submitted until over one month later, on November 22, 2004. Consequently, regardless of the Taylor declaration’s adequacy, the declaration must be struck as an improper attempt to circumvent the expert discovery schedule established by this Court. Because MOSAID can point to no other source for a particularized analysis of the doctrine of equivalents, it has not carried its burden in opposing Infineon’s summary judgment motion.

In sum, MOSAID has failed to proffer any evidence giving rise to a genuine issue of fact for trial. The vague and conclusory statements regarding infringement under the doctrine of equivalents that MOSAID has relied upon to rebut Infineon’s motion are, as a matter of law, insufficient to stave off summary judgment. Therefore, the Court concludes that the accused products do not infringe the asserted Lines and Foss claims under the doctrine of equivalents.

II. INVALIDITY

A. Anticipation: § 102(b) “On Sale” Bar

Under 35 U.S.C. § 102(b), a person is entitled to a patent unless “the invention was ... on sale in this country, more than one year prior to the date of the application for patent in the United States.” In order to prove that an offer for sale was made, an accused infringer must demonstrate by clear and convincing evidence that the invention: 1) was the subject of a commercial offer for sale in this country; and 2) was ready for patenting before the U.S. patent application was filed. Pfaff v. Wells Elecs., Inc., 525 U.S. 55, 67, 119 S.Ct. 304, 142 L.Ed.2d 261 (1998). The Federal Circuit has held that whether an offer of sale has taken place is governed by Federal Circuit law, “to be analyzed under the law of contracts as generally understood,” including the Uniform Commercial Code. Group One, Ltd. v. Hallmark Cards, Inc., 254 F.3d 1041, 1047 (Fed.Cir.2001).

The Federal Circuit has not directly addressed what it means for an “offer of sale” to be “in this country.” Before the Federal Circuit’s conception, the Ninth Circuit stated that “[a]n offer for sale, made in this country, is sufficient prefatory activity occurring here, to bring the matter within the statute.” Robbins Co. v. Lawrence Mfg. Co., 482 F.2d 426, 434 (9th Cir.1973). Rephrasing that statement, the Court of Federal Claims articulated that a “product is ‘on sale’ in the United States, within the proscription of the statute, if substantial activity prefatory to a sale occurs in the United States.” MDS Assocs., Ltd. P’ship v. U.S., 37 Fed. Cl. 611, 631 (1997), aff'd, 135 F.3d 778 (Fed.Cir.1998) (quoting Robbins Co., 482 F.2d at 434).

MOSAID moves for summary judgment arguing that the Original Equip ment Manufacturer Agreement in Principle (“OEM Agreement”) is not prior art under 35 U.S.C. § 102(b) for two reasons: (1) it was not an offer for sale made in this country; and (2) it was not a definite offer for sale. The OEM Agreement was reached between MOSAID and Sanyo, and required Sanyo to sell to MOSAID Fast 1M DRAM chips and their derivatives. These chips appear to have incorporated the word line driver of the Lines patents and the voltage pump of the Foss patents. Infineon contends that MOSAID bargained with and received an offer of sale from a Sanyo Semiconductor (“Sanyo U.S.”) 20 employee based in a New Jersey office, not from Sanyo Electric Co., the Japanese corporation (“Sanyo Japan”), and thus the OEM Agreement was a definite offer of sale made in this country. In an effort to buttress that contention, Infineon argues that substantial activity prefatory to the OEM Agreement occurred in the United States. (Infineon’s Opp’n Br. at 22-23). Infineon relies on five alleged facts to demonstrate that Sanyo U.S. was substantially involved in making the offer for sale. However, as explained below, these five alleged facts do not raise a genuine issue of material fact precluding summary judgment.

First, Infineon contends that Mr. Aki Goto, a Sanyo U.S. employee based in New Jersey, was Sanyo’s primary negotiator for the OEM Agreement. In support of that contention, Infineon submits only the deposition testimony of Iain Scott, the person who negotiated on behalf of MOSAID for the OEM Agreement. But that uncorroborated evidence is insufficient under the case law to establish the OEM Agreement as § 102(b) prior art. See Finnigan Corp. v. Int’l Trade Comm’n, 180 F.3d 1354, 1367 (Fed.Cir.1999) (stating that a witness’ uncorroborated testimony is not legally sufficient evidence of invalidating activities under § 102(b)). Further, that evidence shows that MOSAID fought very hard with Sanyo Japan for the right to have an OEM Agreement, and that Sanyo Japan is the company that made the offer to sell DRAM chips to MOSAID, not Sayno U.S. 21

Second, Infineon contends that the OEM Agreement executed by Sayno was sent from Sanyo’s New Jersey location to MO-SAID. Although this is true, it ignores the controlling fact that the agreement was signed by Sanyo Japan. Further, the parties understood that this agreement was binding on Sanyo Japan, not necessarily Sanyo U.S. 22 Additionally, mere transmittal of the agreement from the New Jersey location to MOSAID does not constitute substantial activity.

Third, Infineon relies heavily on the fact that MOSAID faxed a signed copy of the OEM Agreement back to Sanyo in New Jersey. Although true, the content of the fax cover sheet shows that Sanyo Japan was the true party of interest. The sender of the fax stated: “I will fax all of the signed pages directly to Japan. The pages attached [and being sent to New Jersey] are for your reference only.” (Feb. 19, 1990 Fax Cover Sheet from MOSAID to Aki Goto (emphasis added)).

Fourth, Infineon contends that the evidence establishes that chips produced under the OEM Agreement were sent to MOSAID from Sanyo in New Jersey. This contention is without merit. Infi- neon’s sole piece of evidence in support of this contention is the deposition testimony of an ex-MOSAID employee. 23 That testimony states that because Sanyo Japan was making the chips, it did not matter to MOSAID whether they shipped them directly to Canada, or shipped them to the U.S. and then to Canada. 24 Indifference as to the path of delivery does not demonstrate that Sanyo U.S. was substantially involved in forging the OEM Agreement.

And fifth, Infineon contends that a MO-SAID purchase order under the OEM Agreement was sent by MOSAID to Sanyo in New Jersey. This contention is also without merit. The OEM Agreement concerned only DRAM chips. However, the only purchase order Infineon relies on concerns silicon wafers, not DRAM chips. Consequently, the purchase order proves nothing with regard to the OEM Agreement.

In short, even assuming that MOSAID’s offer was a commercial offer for sale, Infi-neon does not offer evidence showing that substantial activity prefatory to the OEM Agreement took place in this country. Thus, the OEM Agreement is not prior art under § 102(b), and therefore summary judgment is granted in MOSAID’s favor..

B. Anticipation: § 102(g) “Prior Invention” Bar

MOSAID has moved for summary judgment that two DRAM chips— the Texas Instrument (“TI”) Design and the Micron 4M DRAM — do not qualify as prior art for anticipation purposes under 35 U.S.C. § 102(g). Under § 102(g), a person is not entitled to a patent if “before such person’s invention thereof, the invention was made in this country by another inventor who had not abandoned, suppressed, or concealed it.” 35 U.S.C. § 102(g)(2). “A prior art device can anticipate a claimed invention under § 102(g)(2) if it was conceived and reduced to practice prior to the filing date of the patent.” Sandt Tech. Ltd. v. Resco Metal and Plastics Corp., 264 F.3d 1344, 1350 (Fed.Cir.2001) (emphasis added). An invention is conceived when the inventor forms the “definite and permanent idea of the complete and operative invention.” Cooper v. Goldfarb, 154 F.3d 1321, 1327 (Fed.Cir.1998). Actual reduction to practice, the only reduction to practice relevant in this case, is established when the inventor proves that: 1) he constructed an embodiment that met all the claim limitations; and 2) he determined that the invention would work for its intended purposes. Id.

1. TI Design

MOSAID argues that Infineon cannot prove that the TI design, which actually consists of two designs, the “old” design and the “new” design, is prior art under § 102(g). The Lines U.K. application was filed on April 6, 1990. Consequently, in order for the two designs to qualify as prior art under § 102(g), Infineon must proffer evidence showing that they were conceived and reduced to practice before that date.

Taking the “new” design first, it is undisputed that it was not conceived until May 1990. (Expert Report of Robert N. Rountree at ¶ 20). Because that conception date is after the Lines U.K. application was filed, the “new” design is not prior art under § 102(g).

Turning to the “old” design, the following facts are undisputed. Before February 1990, .the TI engineers worked on designing a circuit that used a word line driver circuit that included a PMOS pass transistor to apply a high Vpp voltage to the selected word line. By February 16, 1990, TI inventors completed the design of the “old” circuit. By March 2, 1990, TI designers developed a computer simulation of the row decoder and word line driver circuitry and found that it worked for its intended purpose. (See Expert Report of Robert N. Rountree ¶¶ 13-15). TI did not make a chip embodying the row decoder and word line driver circuitry before April 6,1990. Thus, the Court is presented with the question whether the simulation of the “old” design was a valid reduction to practice.

MOSAID never takes issue with Infi-neon’s expert who said that a computer simulation was sufficient to achieve reduction to practice. Instead, it merely insists that without a physical embodiment, there cannot be reduction to practice. MOSAID does so without submitting any case law holding that simulations cannot evidence a reduction to practice.

Although MOSAID did cite to Pfaff v. Wells Elecs., Inc., 525 U.S. 55, 119 S.Ct. 304, 142 L.Ed.2d 261 (1998) at the Mark-man hearing, 25 that case is inapposite. In Pfaff, the Supreme Court was confronted with the issue of “whether the commercial marketing of a newly invented product may mark the beginning of the 1-year period [under § 102(b) for purposes of the on-sale bar] even though the invention has not yet been reduced to practice.” Id. at 57, 119 S.Ct. 304. In defining that as the issue sub judice, the Court dropped a footnote describing what constitutes a “reduction to practice.” It stated:

“A process is reduced to practice when it is successfully performed. A machine is reduced to practice when it is assembled, adjusted and used. A manufacture is reduced to practice when it is completely manufactured. A composition of matter is reduced to practice when it is completely composed.”

Id. at 57 n. 2, 119 S.Ct. 304 (quoting Corona Cord Tire Co. v. Dovan Chem. Corp., 276 U.S. 358, 383, 48 S.Ct. 380, 72 L.Ed. 610 (1928)). However, in doing so, the Supreme Court did not state that this is an exclusive list of examples of what constitutes a reduction to practice; it did not state that these examples set a floor on what could qualify as a reduction to practice; nor was the question of whether a simulation could constitute a reduction to practice before the Court. Indeed, this Court finds it highly unlikely that the Supreme Court would rely on a quote from a 1928 case to establish the minimum form an embodiment must take to qualify as a reduction to practice without clearly articulating that it was doing so. Therefore, the question of whether a simulation can legally constitute a reduction to practice remains undecided.

The Court, at this time, is loathe to adopt MOSAID’s position and conclude that a computer simulation can never be a reduction to practice. Although the Court is not aware of any case law that has found a computer simulation to be a reduction to practice, neither has case law ruled out the possibility that it may suffice. See, e.g., McDonnell Douglas Corp. v. U.S., 229 Ct. Cl. 323, 670 F.2d 156, 161 (1982) (suggesting that a computer simulation may be a valid reduction to practice, but not if subsequent, actual physical testing proves that it is inadequate). Obviously, not all simulations constitute an actual reduction to practice. The Court appreciates MO-SAID’s position that an actual physical embodiment of the device is necessary to ensure the device will work for its intended purpose. Of course, that remains the paradigm for demonstrating a reduction to practice. But surely, in this technologically advanced society of ours, there are areas of science where a successfully run simulation represents the end of the inventive process and the construction of the physical embodiment is but a matter of mere routine and mechanical application. In that case, and only in that case, it seems appropriate that a simulation should be a valid reduction to practice.

Here, whether a simulation of a word line driver circuit in 1990 satisfies that strict standard cannot be determined. Although Infineon has presented evidence that the TI engineers understood from the simulations that the circuitry would work for its intended purpose, it has not addressed what trials and tribulations, if any, had to be endured in 1990 to convert a simulation of a circuit into the actual physical embodiment. MOSAID, on the other hand, has not proffered any evidence demonstrating that a circuit simulation in 1990 could not be a reduction to practice. 26 Consequently, it appears there is a genuine issue of material fact that precludes granting summary judgment as to the TI “old” design.

2. Micron 4M DRAM

MOSAID argues that the Micron 4M DRAM design is not prior art under § 102(g). The undisputed facts are as follows: As of March 26, 1990, Micron had a schematic showing a word line driver circuit and voltage pump. Micron made chips based on the March 26, 1990 design in April 1990. Micron performed its first tests of record on April 9 and its second tests on April 11.

From that simple recitation of facts, it is clear that Infineon cannot establish an actual reduction to practice before April 6, 1990. As stated above, in order to show reduction to practice, it must be shown that an embodiment was constructed and worked for its intended purpose before the filing date of the patent. Cooper, 154 F.3d at 1327. Infineon has not shown that the experimental chips were tested and, therefore, were understood to work for their intended purpose before April 9,1990.

Because April 9, 1990 is three days after the Lines U.K. application was filed, the Micron 4M DRAM cannot be prior art under § 102(g).

C. Anticipation: § 102(b) “Printed Publication” Bar

MOSAID seeks summary judgment that several references, which qualify as printed publications under 35 U.S.C. § 102(b), do not anticipate the asserted claims under the printed publication bar. Under 35 U.S.C. § 102(b), a person is not entitled to a patent if “the invention was ... described in a printed publication in this or a foreign country ... more than one year prior to the date of the application for patent in the United States.” If such a printed publication exists, it “anticipates a patent claim if [it] discloses, either expressly or inherently, all of the limitations of the claim.” EMI Group North Am., Inc. v. Cypress Semiconductor Corp., 268 F.3d 1342, 1350 (Fed.Cir.2001). An anticipated claim is an invalid claim.

1. Fujii

MOSAID argues that the Fujii article, “A 45-ns 16M DRAM with Triple-well Structure,” IEEE Journal of Solid-state Circuits, Vol. 24, No. 5 (Oct.1989), does not anticipate the asserted claims of the Lines patents because it does not teach or suggest a controlled, substantially constant high voltage Vpp, which is required by all of the asserted Lines claims. 27 Infineon disagrees, arguing that Fujii does show a substantially constant high voltage Vpp during word line selection.

The question of what constitutes a “substantially constant” high voltage was not expressly addressed by the Court in its Markman Opinion because it was not before the Court at that time. However, in discussing the prior art and its use of uncontrolled voltages, the Court stated:

An uncontrolled voltage is a voltage that may vary considerably over time, as opposed to a substantially constant voltage. In the prior art, an uncontrolled voltage was created by inserting a boosting capacitor between the pass transistor and the word line.... This would result in a “word line voltage that increases over a period [of time].”

(Markman Op. at 11 n. 11). Thus, by implication, a “substantially constant voltage” is a voltage that does not vary considerably over time. Obviously, this begs the question of what does “considerably” mean. Unfortunately, the parties have not briefed this issue and therefore the Court finds itself in a position where it cannot definitively provide an answer to the parties. This uncertainty, however, does not preclude denial of summary judgment with regard to Fujii because the Court finds that a genuine issue of fact exists.

MOSAID’s motion is predicated on the argument that the high voltage at issue is generated by a boosting capacitor. 28 According to MOSAID, use of a boosting capacitor varies the voltage applied to the word line from 4 to 8 volts each memory cycle. Although the Court agrees that a variation of about 4 volts is not substantially constant, the problem with MOSAID’s argument is that a memory cycle does not appear to be the relevant time frame within which the Court should be analyzing the voltage level. Instead, it appears the appropriate time frame is the “active memory cycle,” i.e., the time when the voltage is actually being applied to the word line such that data is being written into or read out of a memory cell. In that case, it appears the voltage is varying far less, from 7 to 7.5 volts. (See MOSAID’s Br. in Support of Its Motions for Summ. J. Against Samsung and Infineon (“MO-SAID’s Br. Against Samsung & Infineon”) at 24-25 (quoting ’703 patent, Application No. 09/919,752, 9/25/02 Amendment at 3)). The voltage difference during that time frame is small enough that it may be considered “substantially constant.” 29 Thus, whether Fujii teaches the use of a substantially constant high voltage Vpp likely depends on the relevant time frame. Because it is unclear which time frame is the relevant time frame, the Court can only conclude that there is a genuine issue of material fact whether Fujii anticipates the asserted Lines claims.

2. Kajigaya

MOSAID asserts that Kajigaya, U.S. Patent No. 5,602,711, is missing two limitations found in the asserted Foss claims. 30 Those two limitations are: (1) a “second switch driven by clock signals;” and (2) “alternately connecting/switching the first terminal of the boosting capacitor to the voltage supply and to the capacitive load.” Infineon disagrees, arguing that MOSAID fails to rebut its evidence that those two limitations are met. Infineon is correct.

First, MOSAID argues that Kajigaya lacks a “second switch.” “Switch” has been defined as “a device for making, breaking, or changing the connection of a circuit, but not a transistor introducing a threshold voltage drop or a transistor configured as a diode.” (Markman Order at ¶ 39). MOSAID argues that the transistor Infineon identifies as the “second switch” introduces a threshold voltage drop and therefore cannot be a “switch” as defined by the Court.

In Kajigaya, the transistor that Infineon identifies as the “second switch” is an NMOS transistor. Contrary to MOSAID’s assertion, there is an issue of fact whether that transistor allows the voltage passing from the boosting capacitor to the capacitive load to drop by a threshold voltage. MOSAID has not adequately shown that it does. In fact, although it cannot be confirmed, it appears that the transistor identified as the “second switch” allows the total voltage applied to its drain (2VCC — Vth) to pass without introducing a threshold voltage drop.

Second, MOSAID argues that Kajigaya does not “alternately connect” the first terminal of the boosting capacitor because the transistor identified as the “second switch” never shuts off. However, in support of this argument, MOSAID provides no evidence other than the conclusory statement of its expert. (See Rebuttal Expert Report of Richard Greene at ¶ 72 (“As the transistor 40 does not turn off, the function of alternately connecting cannot be performed, only that of simultaneously connecting.”)). In light of that inadequate showing, and because Infi-neon’s expert contends that it does shut off, 31 the Court cannot resolve this issue on summary judgment.

Consequently, MOSAID has failed to dispel any genuine issues of material fact and, therefore, summary judgment must be denied as to Kajigaya.

3. Yanagisawa

MOSAID argues that Yanagisawa, U.S. Patent No. 5,150,325, lacks the same two limitations that it alleged Kajigaya was missing. See Section II.C.2, supra. Infineon argues that material issues of fact preclude summary judgment as to those two limitations.

The circuit shown in Figure 42c of Yan-agisawa shows that the transistor Infineon identifies as the “second switch,” NMOS transistor T6, will not allow the full voltage applied to the drain to pass to its source. Instead, it will suffer a threshold voltage drop. (Rebuttal Expert Report of Richard Greene at ¶ 97). Infineon does not dispute that there is some threshold voltage loss. (McAlexander Invalidity Expert Report at Ex. H, p. 13). Consequently, the Court finds that Yanagisawa cannot anticipate the asserted Foss claims, and summary judgment is granted in MOSAID’s favor.

4. Harmon, Holbrook, Horiguchi and Rosenthal 32

MOSAID moves for summary judgment that these references do not anticipate any of the asserted Foss claims. Infineon responds by arguing that it “does not rely on any of these references for anticipation of the claims asserted by MOSAID.” (Infi-neon’s Opp’n Br. at 32). MOSAID did not dispute this representation in its reply brief. Rather, it noted for the first time at the Markman hearing that Infineon allegedly relied on these references for anticipation purposes as demonstrated by the McAlexander’s Invalidity Expert Report. (See Summ. J. Argument Tr. at 50 (directing the Court to Exhibits F, G, and H of the McAlexander Invalidity Expert Report)). Having reviewed the sections highlighted by MOSAID of McAlexander’s report, the Court disagrees with MOSAID’s assertion.

To the extent that McAlexander referred to these references, he did so in the context of an obviousness, not anticipation, analysis. This is clear from his use of the phrase “in view of’ at the beginning of each invalidity claim chart. (See, e.g., McAlexander Invalidity Expert Report at Ex. H, pp. 22 and 25). Accordingly, Infi-neon accurately represented that it does not assert these printed publications as anticipatory references and, therefore, summary judgment is inappropriate under these circumstances.

III. UNENFORCEABILITY

A. Prosecution Laches

Infineon asserts as an affirmative defense that the asserted patents in suit are unenforceable due to prosecution laches. Prosecution laches renders a patent unenforceable if there has been an “unreasonable and unexplained delay in prosecution even though the applicant complied with pertinent statutes and rules.” Symbol Techs., Inc. v. Lemelson Med., 277 F.3d 1361, 1363, 1368 (Fed.Cir.2002). The primary purpose behind the prosecution laches doctrine is to protect the public’s intervening adverse rights. See id. at 1365. A patentee may tread on the public’s intervening adverse rights by engaging in one of two tactics, or a combination of the two. The patentee may engage in “submarine patenting,” ie., he may file a patent application and then unduly delay prosecution such that a patent does not issue for many years. The application acts like a submarine, undetected and waiting to be used. Once the public, unaware of the pending application, expends time, effort, and resources to further ad- vanee the same technology, the patent suddenly issues, or surfaces, and the patentee attempts to reap the pecuniary rewards. See, e.g., Woodbridge v. United States, 263 U.S. 50, 44 S.Ct. 45, 68 L.Ed. 159 (1923) (delaying nine and a half years in prosecuting patent in suit); Webster Elec. Co. v. Splitdorf Elec. Co., 264 U.S. 463, 44 S.Ct. 342, 68 L.Ed. 792 (1924) (delaying eight years in prosecuting patent in suit). Or, the patentee can timely prosecute an application before the PTO, obtain a patent, wait for intervening developments in the field, and then seek issuance of additional, presumably broader patents covering that technology. See, e.g., Symbol Techs., Inc. v. Lemelson Med., 301 F.Supp.2d 1147, 1154-57 (D.Nev.2004) (patentee delayed between eighteen to thirty-nine years before filing the applications that issued as the patents in suit); Chiron Corp. v. Genentech, Inc., 268 F.Supp.2d 1139, 1142 (E.D.Cal.2002) (patentee delayed over ten years before filing the application that issued as the patent in suit). This case concerns the latter tactic, if any.

MOSAID moves for summary judgment on Infineon’s prosecution laches defense. MOSAID argues that Infineon points to nothing more than the time elapsed between the date the initial Lines and Foss patent applications were filed and the date the patents in suit issued. MOSAID argues that, as a matter of law, delay alone is not a sufficient basis upon which prosecution laches may be found, and thus summary judgment is appropriate.

Infineon responds by arguing that summary judgment should be denied because there remain issues of fact regarding the reasonableness of MOSAID’s delay in prosecuting the patents in suit. MOSAID finished developing the technology underlying the Lines and Foss families by April 1990, when it filed the U.K. applications. MOSAID then relied on that filing date when it submitted the initial Lines and Foss U.S. applications. According to Infi-neon, over the next twelve years, MOSAID engaged in a campaign of filing continuation and divisional applications in the Lines and Foss families in an effort to obtain ever broader claims. In the interim, Infineon developed and sold DRAM products in the United States. Those products are now accused of infringing MOSAID’s later-obtained claims. Infi-neon argues that because MOSAID cannot demonstrate that this twelve-year delay is reasonable, the Court should deny summary judgment.

Although Infineon appears to assert that all of the asserted patents are unenforceable because a twelve-year delay is unreasonable, not all of the patents issued twelve years after the priority date. Thus, the Court interprets Infineon’s opposition to contend that only those asserted patents that issued twelve years after the prior date — after April 2002 — are unenforceable due to prosecution laches. Only two patents fit that description; both the Foss ’654 patent and the Lines ’703 patent issued over thirteen years after the priority date. As for the other earlier-issued patents, the Court finds that Infineon has not made any showing nor argued that the prosecution of those patents was due to an unexplained and unreasonable delay and, therefore, grants partial summary judgment in favor of MOSAID.

With regard to the ’654 and ’703 patents, the Court believes that a thirteen-year time gap raises some serious questions as to the reasonableness of MO-SAID’s delay. See Symbol Techs., Inc., 301 F.Supp.2d at 1156 (“[U]nreasonable delay alone is sufficient to apply prosecution laches without the requirement that [the patentee] intended to gain some advantage by delay.”). In addition, the ’703 patent appears to contain claims broader than the earlier-issued Lines patents. 33 The ’703 claims appear to be broader because, unlike the earlier Lines patents, they do not require a “latching” level shifter. As discussed earlier in this opinion, the Court found that Infineon’s accused products do not infringe any asserted Lines claim that contains a “latching” limitation. As a result, even though the accused products cannot infringe many of the Lines patents, they may still infringe a patent that issued thirteen years after the initial disclosure of this invention to the public. Obviously, the potential prejudice to the public, and Infineon, because MO-SAID dropped a claim limitation is profound. 34 At some point, the public is “entitled to assume that what was not claimed [is] dedicated to the public.” Symbol Techs. Inc., 301 F.Supp.2d at 1155-56. In this case, whether a delay of more than twelve years extends beyond that point will have to be determined at trial.

B. Inequitable Conduct

MOSAID moves for summary judgment that all of the Lines patents are not unenforceable due to inequitable conduct. MO-SAID argues that it is entitled to summary judgment because: (1) there is no evidence of intent; and (2) “infectious unenforce-ability” does not apply here.

“Inequitable conduct resides in the failure to disclose material information, or submission of false material information, with an intent to deceive, and those two elements, materiality and intent, must be proven by clear and convincing evidence.” Kingsdown Medical Consultants, Ltd. v. Hollister Inc., 863 F.2d 867, 872 (Fed.Cir.1988). “Once thresholds of materiality and intent have been established, the court conducts a balancing test and determines whether the scales tilt to a conclusion that ‘inequitable conduct’ occurred.” Critikon, Inc. v. Becton Dickinson Vascular Access, Inc., 120 F.3d 1253, 1256 (Fed.Cir.1997). However, in order to get to the balancing test, some evidence of materiality and intent must be proffered.

“To be guilty of inequitable conduct, one must have intended to act inequitably.” FMC Corp. v. Manitowoc Co., 835 F.2d 1411, 1415 (Fed.Cir.1987). A “smoking gun” is not necessary to establish an intent to deceive. Paragon Podiatry Lab., Inc. v. ELM Labs., Inc., 984 F.2d 1182, 1189 (Fed.Cir.1993). “Rather, this element of inequitable conduct, must generally be inferred from the facts and circumstances surrounding the applicant’s overall conduct.” Id. at 1190.

To prove infectious unenforceability, an accused infringer must establish two elements: (1) that a patent is unenforceable due to inequitable conduct; and (2) that related patents bear an immediate and necessary relation to that alleged ineq uitable conduct. Arthrocare Corp. v. Smith & Nephew, Inc., 310 F.Supp.2d 638, 675 (D.Del.2004).

Infineon alleges that MOSAID committed inequitable conduct in prosecuting the Lines patents when its employees and agents responsible for filing the Lines patents failed to disclose the prior art reference Fujii during the prosecution of the ’602 patent application before the U.S. Patent & Trademark Office (“U.S. PTO”). As a result, Infineon alleges that the ’602 patent is unenforceable. As for the other Lines patents, the ’253, ’643, ’640, and ’703 patents, Infineon argues that they are unenforceable under the doctrine of “infectious unenforceability” because they count the ’602 patent application as part of their prosecution history.

The following facts are undisputed: Fu-jii is a highly material reference. It was referred to in a footnote of the Lines invention disclosure form, which was prepared by Peter Gillingham with the assistance of Dr. Foss. That form was sent to Edward Pascal, MOSAID’s patent attorney, as the basis for filing a patent application. Before forwarding that form to the attorney prosecuting the patent application in the U.K., the country where MOSAID had chosen to file its patent application first, Pascal made some changes to the disclosure, including drawing lines through the footnote that contained the reference to Fujii. At that time, patent applicants were not required to disclose material pri- or art, such as Fujii, to the U.K. patent office. The U.K. patent attorney handling the matter excised the Fujii footnote before filing the application with the U.K. patent office. As a result, the U.K. application as filed did not refer to Fujii.

Pascal later took the U.K. application and submitted it to the U.S. PTO in conjunction with the first Lines patent application in order to obtain the U.K. application’s earlier filing date. The U.S. Lines application, like the U.K. application, did not disclose Fujii. Pascal testified that Fu-jii was not disclosed to the U.S. PTO due to what must have been a clerical error.

After the ’602 patent issued, but while the continuation application of the ’602 patent application was still pending before the U.S. PTO, Gillingham realized that Fujii had not been disclosed. He then raised this fact with the new attorney prosecuting the Lines application, Jim Smith. MO-SAID then disclosed Fujii to the U.S. PTO in a June 1997 information disclosure statement (“IDS”).

In October 1997, Valerie Lines, the inventor, Gillingham and Smith spoke with the patent examiner about the Fujii reference. The then-pending application was later allowed and issued as the ’253 patent, apparently without rejection over , Fujii. Subsequently, the Fujii article was cited in every continuation and continuation-in-part application filed in the Lines patent family, and the ’643, ’640 and ’703 patents issued over it.

Infineon bears the burden of proving both materiality and intent to deceive by clear and convincing evidence. Materiality having been conceded by MOSAID, the issue on summary judgment is whether Infineon has proffered sufficient evidence of deceptive intent warranting denial of summary judgment. The Court concludes that Infineon has not satisfied its burden.

Infineon argues that Pascal’s explanation for failing to include Fujii in the ’602 patent application — that it was due to a clerical error — is contradicted by a document found in his patent file which states that Tibor Gold was responsible for deleting the Fujii reference. Infineon however perceives a contradiction by improperly comparing a file document describing why Fujii was not disclosed in the U.K. applica tion with testimony concerning why Pascal did not disclose Fujii to the U.S. PTO. Pascal’s position appears to have always been that a U.K. associate was responsible for not disclosing Fujii to the U.K. patent office. Further, Infineon has not shown that Pascal’s explanation for failing to disclose Fujii to the U.S. PTO was anything other than a clerical error. Thus, no contradiction exists from which deceptive intent may be inferred.

Infineon also argues that MOSAID intentionally submitted the U.K. application, which did not refer to Fujii, to the U.S. PTO. But this fact, by itself, does not warrant an inference of deceptive intent. MOSAID intentionally submitted the U.K. application to the U.S. PTO in order to gain the priority date of the U.K. application. This act does not show an intent to withhold Fujii. That would only be the case if Infineon had proof that Fujii was intentionally removed from the U.K. application to deceive the U.S. PTO, evidence that Infineon lacks.

In sum, Infineon provides no evidence from which this Court can infer that removal of the Fujii citation was done in bad faith or for any reason besides adherence to a U.K. patent prosecution custom. Infi-neon provides no evidence that Fujii was purposely withheld from the U.S. PTO or even that it was known by MOSAID that Fujii had not been disclosed to the U.S. PTO in 1991. Indeed, when MOSAID discovered that Fujii had not been put before the patent examiner, it disclosed the reference to the U.S. PTO in an IDS. Notably, the U.S. PTO then allowed four Lines patents to issue over Fujii.

In conclusion, because there is no evidence of deceptive intent, the ’602 patent is not unenforceable. And because the ’602 is not unenforceable, the argument that other Lines patents are unenforceable due to “infectious unenforceability” is perforce rejected. Accordingly, summary judgment is granted in favor of MOSAID on Infi-neon’s inequitable conduct defense.

IV. MARKING

Infineon moves for partial summary judgment to limit potential damages pursuant to 35 U.S.C. § 287(a). Under § 287(a), a patentee has an obligation to provide notice to the public of a patent’s existence when it covers a product made by the patentee or a licensee. Section 287(a) states in pertinent part:

Patentees, and persons making, offering for sale, or selling within the United States any patented article for or under them, or importing any patented article into the United States, may give notice to the public that the same is patented ... together with the number of the patent .... In the event of failure so to mark, no damages shall be recovered by the patentee in any action for infringement, except on proof that the infringer was notified of the infringement and continued to infringe thereafter, in which event damages may be recovered only for infringement occurring after such notice. Filing of an action for infringement shall constitute such notice.

35 U.S.C. § 287(a).

Thus, notice may be provided in two ways. The patentee may provide constructive notice by marking the patentee’s products, including any licensee’s products, with the patent numbers. Or, in the absence of constructive notice, the patentee may provide actual notice of infringement. Actual notice can take many forms, including sending a potential infringer a letter that charges a particular product with infringement of a specific patent or filing a patent infringement action. See, e.g., SRI Int'l, Inc. v. Advanced Tech. Labs., Inc., 127 F.3d 1462, 1470 (Fed.Cir.1997) (“Although there are numerous possible varia tions in form and content, the purpose of the actual notice requirement is met when the recipient is notified, with sufficient specificity, that the patent holder believes that the recipient of the notice may be an infringer.”)- Compliance with the notice provision is a question of fact. Maxwell v. J. Baker, Inc., 86 F.3d 1098, 1111 (Fed.Cir.1996).

Here, there is no dispute that neither MOSAID nor its licensees marked DRAMs with the numbers of the patents in suit. Consequently, MOSAID’s damages are limited by when, and to what extent it provided Infineon with actual notice that its DRAMs infringe the patents in suit.

MOSAID first provided Infineon with actual notice of infringement on November 4, 1999. Therefore, the earliest possible date upon which MOSAID can collect damages for infringement of any of the patents in suit is November 4, 1999. However, Infineon takes issue with the sufficiency of the November 4, 1999 letter, arguing that it only identified a single DRAM product. Infineon further argues that over the next three years, and before the lawsuit was filed, MOSAID only identified two more particular DRAM products. Thus, Infineon requests that the Court limit MOSAID’s pre-lawsuit damages to those three DRAM products.

MOSAID contends that the November 4, 1999 letter adequately charged all of Infineon’s DRAMs with infringement and therefore it is entitled to damages arising from all of the asserted products beginning on November 4, 1999. The November 4, 1999 letter states in relevant part:

In the process of reviewing the various patents contained in the MOSAID portfolio, we have reached the conclusion that there are a wide variety of patents in the portfolio for which Infineon may be interested in obtaining a license. Based on the results of our review, and considering the fact that Infineon is one of the world’s largest manufacturers of DRAMs, it is our firm belief that Infineon currently needs to acquire a license under at least the following patents, which have to do with semiconductor memory circuits, and DRAMS in particular:

[U.S. Patent Nos. 5,214,602, 5,406,523, 5,751,643, 5,822,253, and 5,828,620.]

Furthermore, I have enclosed with this letter detailed patent claims anal-yses prepared by Chipworks, an independent firm, based on reverse engineering of the Siemens HYB39S64800AT-8 2M x 8 x 4(64M) SDRAM and the following claims;

United States Patent Number 5,822,-253, claim 1,

United States Patent Number 5,822,-253, claim 15,

United States Patent Number 5,828,-620, claim 1, (sic)

* sl< *

We are of the opinion that Infineon, either now, or some time over the months and years ahead, is already in need of, or will, in the future, be in need of, a license under a number of the various U.S. and foreign patents enumerated in the attached document. In fact, we very strongly believe that Infi-neon, through its worldwide manufacture and sale of DRAMs, is either now infringing, or will be infringing in the future, some of the [63 U.S.] patents enumerated in the attached document.

(Nov. 4, 1999 Letter from Peter Gilling-ham of MOSAID to Roland Rehlander of Infineon, bold in original).

Both parties seize on different sections of the letter as quoted above to support their argument. Infineon contends that the bold portion is the only relevant portion for actual notice purposes because it alleges that a particular product, the HYB39S64800AT-8 DRAM, infringes specific patent claims. MOSAID disagrees, contending that even though its letter did not identify every possible infringing device, its letter accused Infineon’s DRAMs and DRAM products of infringing the ’253, ’620, ’643, ’201 and ’640 patents.

Section 287(a) is structured to encourage patentees to mark their products, i.e., to provide constructive notice. If patentees mark their products, they put the world on notice of the patent’s existence and, generally speaking, may acquire damages for all infringing products from the date marking began. However, if patentees choose to forego marking them products, the statute penalizes patentees by imposing the duty to provide actual notice to each person infringing the patents before they can collect damages. This duty is more onerous than merely marking one’s products because “[a]ctual notice requires the affirmative communication of a specific charge of infringement by a specific accused product or device.” Amsted Indus. Inc. v. Buckeye Steel Castings Co., 24 F.3d 178, 187 (Fed.Cir.1994) (emphasis added). Mo-rever, the focus remains on the “actions of the patentee, not the knowledge or understanding of the infringer.” Id. In other words, patentees must do more than provide general advice not to infringe a patent.

In Amsted, the question before the Federal Circuit was whether a particular letter qualified as proper notice under § 287. That letter stated:

This is to advise you that Amsted ... has acquired a number of properties [from Dresser] ... including [the ’269 patent] ....

It is our understanding that Dresser Industries actively sought to enforce its patent ... and those rights have been heretofore respected in the industry. AMSTED-ASF expects to continue to enforce those rights which it has acquired and similarly expects our industry to respect its patents.

Accordingly, you should acquaint yourself with the [’269 patent] and refrain from supplying or offering to supply component parts which would infringe or contribute to the infringement of the patent[ ]. You should not offer to supply items which are copies of or designed to replace our LOW PROFILE center plate.

Id. at 186. The Federal Circuit characterized that letter as “merely informational,” rather than as a specific charge of infringement. Id. at 186-87. The court concluded “as a matter of law that the 1986 letter, which notified the whole industry, including Buckeye, only of Amsted’s ownership of the patent and generally advised companies not to infringe, was not notice within the meaning of section 287.” Id. at 187.

Here, the problem with MOSAID’s argument — that the November 4, 1999 letter apprised Infineon that all of its DRAMs infringed five of MOSAID’s patents' — -is that the first and last paragraphs of the excerpt above upon which MOSAID relies to demonstrate proper notice do not specifically charge any product with infringement of any patent. Rather, those sections of the letter resemble the informational content of the letter in Amsted. They offer nothing more than general advice that Infineon should acquaint itself with MOSAID’s “various U.S. and foreign patents.” Consequently, the Court does not believe that MOSAID’s letter provid ed the “sufficient specificity” 35 needed to place Infineon on notice that any product other than the one identified infringes any of MOSAID’s patents.

Moreover, MOSAID’s actions after November 4, 1999 support this conclusion. Subsequent, pre-lawsuit communications from MOSAID to Infineon limited accusations of infringement to a total of three products. On August 1, 2000, MOSAID sent Infineon additional claims analyses regarding the HYB39S64800AT-8 DRAM, alleging that it infringed not only the ’253 and ’620 patents, but the ’643 patent as well. On July 17, 2001, MOSAID sent Infineon a letter that included a chart specifically accusing a second product, Infi-neon’s 256 SDRAM, HYB39S256800AT-8, of infringing the ’201 patent. MOSAID confirmed that it was accusing only two products of infringing MOSAID patents in March 2002, when both companies met to discuss possible licensing opportunities and MOSAID identified only the two previously named accused products during a PowerPoint presentation.

Finally, at a May 29, 2002 meeting between the companies, MOSAID accused a third product, the MediaQ MQ-200 Graphics Controller HYP90MQARO, of infringing the ’640 patent. Indeed, it was not until November 2003, nine months after MOSAID filed its infringement counterclaims and approximately four years after the first actual notice of infringement, that MOSAID for the first time accused twenty-five other products of infringing MO-SAID’s patents.

Because MOSAID specifically accused only three DRAM products of infringement before February 7, 2003, the date it filed its infringement claims, MOSAID may only seek pre-suit damages for those three products as of the dates MOSAID notified Infineon that they infringed specific patents. MOSAID notified Infineon that its HYB39S64800AT-8 DRAM allegedly infringes the ’253 and ’640 patents on November 4, 1999 and the ’643 patent on August 1, 2000; MOSAID notified Infi-neon that its HYB39S256800AT-8 SDRAM allegedly infringes the ’201 patent on July 17, 2001; and MOSAID notified Infineon that its MediaQ MQ-200 Graphics Controller HYP90MQARO allegedly infringes the ’640 patent on May 29, 2002. It follows as a corollary that MO-SAID may not seek damages for any asserted infringement of any other patent by those three products before February 7, 2003. Further, MOSAID may not seek damages for any asserted infringement of the ’253, ’643, ’640, ’620 and ’201 patents by Infineon’s other accused products before February 7, 2003, since they were never identified by MOSAID in any notice provided to Infineon.

Lastly, MOSAID accused Infineon of infringing the ’703 and ’654 patents for the first time in October 10, 2003 when it filed its Third Amended Counterclaims. MO-SAID does not dispute that this is the first actual notice of these patents provided to Infineon. As a result, MOSAID may not seek damages concerning the ’654 patent before October 10, 2003. The ’703 patent, however, has a different notice date. The ’703 patent is directed to only method claims. Under Federal Circuit precedent, a methods-only patent need not comply with § 287(a). American Med. Sys., Inc. v. Med. Eng’g Corp., 6 F.3d 1523, 1538 (Fed.Cir.1993). Consequently, MOSAID may seek damages for any asserted infringement of the ’703 patent on or after its date of issuance, August 5, 2003.

Y. MOTION TO STRIKE

MOSAID filed a motion to strike the Rebuttal Expert Report of Joseph McA- lexander Regarding Non-Infringement of MOSAID Patents, and those portions of Infineon’s opposition brief that rely on this report. MOSAID alleges that the complete report should be stricken because it contains opinions regarding Infineon’s non-infringement contentions which were never provided to MOSAID during discovery. MOSAID asserts that these contentions should have been disclosed in response to one of MOSAID’s contention interrogatories. Because they were not, MOSAID seeks to preclude Infineon from being able to rely on them. In the alternative, MO-SAID requests leave to supplement the infringement expert report of David Taylor through the Declaration of David Taylor, which provides new doctrine of equivalents analyses.

There are several significant problems with MOSAID’s motion. MOSAID as the patentee bears the burden of proof on infringement. The Court’s October 1, 2004 scheduling order only allowed for two rounds of expert reports: affirmative and rebuttal reports. MOSAID served its Taylor infringement report on that date. Although that report could have contained opinions stating particular and specific reasons why Infineon’s accused products infringe under the doctrine of equivalents, it did not. Instead, it provided conclusory statements that if the products did not literally infringe, they infringe under the doctrine of equivalents. The fault for not supplying a more detailed expert report lies with MOSAID. It knew that it would only get one bite of the apple, and it chose to forego any substantive doctrine of equivalents analysis.

During the status conference in which the Court discussed with the parties the schedule for expert discovery, the Court asked the parties if they had any comments. MOSAID did not have any. MO-SAID did not complain at that point that Infineon had not provided a response to a contention interrogatory. Nor did it ask for a reply round of expert reports. Instead, all parties accepted the Court’s two-round expert report schedule without comment or complaint.

McAlexander’s report was timely filed pursuant to the Court’s October 1, 2004 scheduling order. When it was served on MOSAID, they did not object. Instead, two weeks later, and without the Court’s permission, MOSAID sought belatedly to serve two expert reports on Infineon. In-fineon moved immediately to strike those reports for noncompliance with the Court’s October 1, 2004 order. The Court struck them, reaffirming its commitment to the case schedule it had established.

MOSAID’s motion to strike is another attempt to circumvent the October 1, 2004 order. MOSAID seeks to either strike the McAlexander report, or to be allowed to file an expert declaration supplementing its expert’s positions on infringement. But MOSAID made a tactical decision when it filed an affirmative expert report with eon-elusory doctrine of equivalents analyses. See Section I.D., supra (discussing the inadequacy of MOSAID’s initial doctrine of equivalents analyses). In doing so, it took a risk that the Court would not allow any further supplementation based on the October 1 order. That risk has become a reality, and as before, MOSAID’s attempt to interject an expert’s opinion after the time allowed is denied.

Accordingly, MOSAID’s motion to strike the McAlexander noninfringement expert report is denied. And, because the Court has stricken the Declaration of David Taylor, see section I.D., supra, MOSAID’s request for alternative relief is likewise denied.

CONCLUSION

For the aforementioned reasons, the parties’ summary judgment motions are granted-in-part and denied-in-part, and MOSAID’s motion to strike is denied in its entirety.

1 . For an in-depth discussion of what these patents claim and how these circuits work, see MOSAID Technologies Inc. v. Samsung Electronics Co. et al., Nos. 01-4340 and 03-4698 (D.N.J. March 23, 2004) (Martini) at 6-12 ("Markman Op.”).

2 . This past January, Samsung and MOSAID settled their respective claims. As a result, the Infineon action is the only action that remains pending before this Court.

3 . Honeywell Int’l Inc. v. Hamilton Sundstrand Corp., 370 F.3d 1131, 1139 (Fed.Cir.2004).

4 . The "latching” limitations come in various forms, including "level shifter with latching,” "latching the level shifted control signals” and "to ... latch.”

5 . (MOSAID's Br. in Support of its Motion for Summ. J. Against Infineon ("MOSAID's Br. Against Infineon”) at 10).

6 . (MOSAID’s Opp'n Br. at 11).

7 . In another attempt to revisit the Court’s claim construction, MOSAID argues that claims 2 and 16 of the '643 patent teach that

the cross-coupled PMOS transistors "latch” the control signals. However, this is an overly narrow reading of those claims. Claim 2, which is representative of claim 16, states "wherein the word line driver circuit comprises cross-coupled field effect transistors to latch the control signals.” '643 patent, claim 2 (emphasis added). The open-ended transitional phrase "comprises” does not limit the circuits that latch the control signals to cross-coupled field effect transistors. On the contrary, it allows for other structure. And as the Court’s Markman Opinion clearly states, that other structure includes two pull-down transistors that enable the level shifter to retain two output states without input signals.

8 . In response to MOSAID's argument that this construction of “latching” is technically without merit, the Court refers MOSAID to its own expert’s report where, by its submission, MOSAID represented the same to this Court. (See Greene Markman Expert Report at ¶ 18). Not surprisingly, MOSAID has chosen not to address this report and its pithy explanation of what a “latch'' means.

9 . The bracketed numbers denote the limitations in dispute and have been inserted for ease of reference.

10 . This limitation appears in various permutations in the asserted claims: "switches ... alternating the level,” "switches ... alternating the logic level,” and "switching means ... alternating the level.”

11 . MOSAID's argument that the Court ruled that "clock sources” are not the same as "clock signals” is a gross misreading of the Markman Opinion. In the Markman Opinion, the Court found that "clock signals” were voltages, not structure. (Markman Op. at 62). The Court did not find that "clock sources” are always structure and never voltages. Indeed, any such conclusion would contradict the description in the Foss specifications, which use "clock signals” and "clock sources” interchangeably. Notably, MOSAID never addresses that description.

12 . In an attempt to stave off rejection of its argument, MOSAID contends that if Infi-neon’s interpretation of "clock sources” is adopted, it would exclude the preferred embodiment set forth in Figure 3 of the Foss patents. That argument is incorrect. The clock sources disclaimer precludes the use of "clock sources” to charge the boosting capacitor; that includes, as depicted in Figure 1, the use of a "clock source” to charge the boosting capacitor through an inverter. See '654 patent 1:51-53 and Fig. 1. The paten-tees clearly distinguished the use of "clock sources” to charge the boosting capacitor from Figure 3. In Figure 3, the "clock sources” do not charge the boosting capacitor, the supply voltage Vdd does. As Dr. Foss testified, the source charging the second terminal of the boosting capacitor is the "key difference” between Figures 1, the disclaimed prior art, and 3, the claimed invention. (See Foss 30(b)(6) Dep. at 129:3-23). Accordingly, MOSAID’s fear that Figure 3 falls within the disclaimer is without merit.

13 . (MOSAID’s Br. Against Infineon at 14-15).

14 . Another limitation of claim 15 also calls for the "second switch” to be "enabled to substantially eliminate a threshold voltage reduction of boosted voltage.” '654 patent, claim 15.

15 . Warner-Jenkinson Co. v. Hilton Davis Chem. Co., 520 U.S. 17, 39 n. 8, 117 S.Ct. 1040, 137 L.Ed.2d 146 (1997).

16 . (Decl. of David L. Taylor in Support of MOSAID’s Response to Infineon's Summ. J. Motion ("Declaration of David Taylor’’)).

17 . Richard Greene is MOSAID’s infringement expert for the asserted Foss claims.

18 . David Taylor is MOSAID’s infringement expert for the asserted Lines claims.

19 . Warner-Jenkinson, 520 U.S. at 29, 117 S.Ct. 1040 ("Each [limitation] contained in a patent claim is deemed material to determining the scope of the patented invention, and thus the doctrine of equivalents must be applied to individual [limitations] of the claim, not to the invention as a whole.”).

20 . Sanyo Semiconductor was at that time Sa-nyo's U.S. subsidiary.

21 . (See Scott Dep. at 17:19-19:11, 75:23-76:14, 77:4-25, 128:14-18, 129:7-130:2).

22 . (See Scott Dep. at 71:23-72:12, 77:4-25, 128:14-18, 151:19-22).

23 . (Infineon’s Opp'n Br. at 22 (citing Scott Dep. at 81, 136-37)).

24 . (Scott Dep. at 136:17-137:4).

25 . (Summ. J. Argument Tr. at 48:3-17).

26 . At oral argument, MOSAID referred to the deposition, testimony of its expert Richard Greene as evidence that a physical embodiment is necessary because a simulation of a circuit is inadequate. (See MOSAID's Summ. J. Presentation, The TI/MICRON Alleged Pri- or Inventions at 6 (“The only time you know whether the circuit actually physically does what you had designed it to do is when you have it doing what you had designed it to do.’’) (quoting Greene 1/19/05 Dep. at 99:24-100:15, emphasis in original)). However, that testimony is conclusory and circular in nature, and does nothing to resolve the question whether a simulation in 1990 could be a valid reduction to practice.

27 . The asserted Lines claims at issue are: '643 patent, claims 1-3, 8-13, 15-17, 22-28; '253 patent, claims 31-34; ’640 patent, claim 1; and '703 patent, claims 1-2. (See MOSAID's Chart of Foss/Lines Claim Limitations Not Found in Defendants’ Asserted § 102 Prior Art References).

28 . The fact that Fujii uses a boosting capacitor to generate the high voltage which is applied to the word line does not mean that it falls within the boosting capacitor disclaimer discussed in the Markman Opinion. (Mark-man Op. at 11, 24-25). That disclaimer concerns the use of a boosting capacitor located between the pass transistor and the word line to supply a boosted voltage to the memory cell access transistor. In that circuit, the voltage applied to the word line varies tremendously, creating longevity problems for the memory cell access transistor. In contrast, the boosting capacitor in Fujii is not located between the pass transistor and the word line. Instead, it is located outside the word line driver circuit and its output is applied to the level shifter. Thus, the Fujii circuit does not practice the disclaimed method, and therefore can still potentially anticipate the asserted Lines claims.

29 . However, as expressed above, the Court is not definitively saying that it is, without further input from the parties.

30 . The asserted Foss claims at issue are: '620 patent, claims 1-3, 5-9, 13-15, 17-21, 24; '201 patent, claims 1, 10-11, 20; and '654 patent, claims 1, 3-4, 6. (See Infi-neon’s Responsive Chart of § 102 Prior Art Alleged by MOSAID To Be Relevant to the Foss/Lines Claims).

31 . (See Suppl. Expert Report of Joseph C. McAlexander Regarding Invalidity of MO-SAID Patents ("McAlexander Invalidity Expert Report”) at Ex. F, p. 19).

32 . Harmon, U.S. Patent No. 4,344,003; Hol-brook, U.S. Patent No. 4,106,086; Horiguchi, Japanese Patent Appl. JP 01-185160; Rosen-thal, U.S. Patent No. 4,400,412.

33 . MOSAID acknowledged that the " '703 is arguably broader than earlier Lines patents in suit.” (MOSAID’s Summ. J. Presentation, Response to the Court’s Question 8).

34 . The fact that the '703 patent is subject to a terminal disclaimer does not alter this conclusion. Although a terminal disclaimer may weigh against a finding of unreasonableness, its applicability does not preclude a finding that the delay in prosecution was unreasonable. See Chiron Corp. v. Genentech, Inc., 268 F.Supp.2d 1139, 1143 (E.D.Cal.2002). A terminal disclaimer only cuts short the life of the patent, making its expiration coterminous with the expiration date of an earlier-issued patent from which it draws priority. It does not mean that the patentee diligently prosecuted the patent in question. Even if the '703 patent only has several years of life remaining, the potential prejudice MOSAID may have caused to Infineon, and ultimately the public, by delaying thirteen years in its continued prosecution of the Lines invention provides sufficient justification for denying MO-SAID’s motion.

35 . SRI Int’l, 127 F.3d at 1470.