In Re Reiffin Family Trust

340 F. App'x 651
CourtCourt of Appeals for the Federal Circuit
DecidedJuly 27, 2009
Docket2008-1544
StatusUnpublished
Cited by2 cases

This text of 340 F. App'x 651 (In Re Reiffin Family Trust) is published on Counsel Stack Legal Research, covering Court of Appeals for the Federal Circuit primary law. Counsel Stack provides free access to over 12 million legal documents including statutes, case law, regulations, and constitutions.

Bluebook
In Re Reiffin Family Trust, 340 F. App'x 651 (Fed. Cir. 2009).

Opinion

BRYSON, Circuit Judge.

The Reiffin Family Trust seeks review of a decision of the United States Patent and Trademark Office’s Board of Patent Appeals and Interferences rejecting, on reexamination, all the claims of an issued patent. We affirm.

*653 I

In 1982, Martin G. Reiffin filed a patent application that disclosed an invention for “providing real-time compilation of a high-level language source program concurrently as the program is being entered or edited at the console by the programmer.” The application explained that “humans write programs in a programming language [known as ‘source code’] and computers execute only machine language [known as ‘object code’].” The application then described a problem with the prior art in which a computer programmer is required to compile the program’s source code between editing sessions, during which “the programmer is compelled to wait for completion of the loading or execution steps.”

To solve that problem, Mr. Reiffin described a way for the program to be compiled “in real-time as the source code is entered or edited by the programmer.” In the disclosed system, the compiler function would be interrupted in favor of the editor function whenever the programmer struck a key on the keyboard. The interrupt would cause control of the computer’s central processing unit (“CPU”) to pass from the compiler to the editor. Mr. Reiffin explained that the interrupt “may be activated by a timer or clock instead of by a keyboard.” In either case, he explained, the CPU would execute the compiler until it was interrupted, either by the programmer stinking a key on the keyboard or by a timer indicating that a preset period had expired. When either of those events occurred, an interrupt routine would save the compiler information, and the editor routine would be invoked. The editor would then perform some function, such as putting the keyed letter onto a computer display screen. Control of the CPU would thereafter be returned to the compiler.

In 1990 and 1994, Mr. Reiffin submitted two continuation applications that ultimately became, respectively, U.S. Patent Nos. 5,694,603 and 5,694,604 (“the '603 and '604 patents”). The '603 patent is directed to “a novel computer memory product including program software interrupt-driven preemptive multithreading processing so as to enable, for example, providing real-time processing of language and other alphanumeric code concurrently as the code is being entered or edited at the console.” The '604 patent is directed more broadly to a “preemptive multithreading computer system with clock activated interrupt.” Multithreading is generally understood as a process by which a computer runs pieces of different “threads” in alternating sequence so rapidly that it appears to be running all the threads simultaneously.

In 1998, Mr. Reiffin sued Microsoft Corporation, alleging that the operating system and the spell-checking and grammar-checking features of Microsoft’s Word program infringed the '604 patent. The district court ruled that the '603 patent was invalid for failing to comply with the written description requirement of 35 U.S.C. § 112, ¶ 1, and that the '604 patent was not entitled to claim priority to a filing date of 1990 or earlier. Reiffin v. Microsoft Corp., 270 F.Supp.2d 1132, 1135 (N.D.Cal.2003). Mr. Reiffin then voluntarily requested reexamination of the '604 patent.

In his reexamination application, Mr. Reiffin argued that the issue of the '604 patent’s priority date raised a “substantial new question of patentability.” Before the PTO, Mr. Reiffin asserted that he invented multithreading in 1982, as disclosed in the application he filed in that year. Because every claim in the '604 patent contains the term “multithreading,” the question whether the '604 patent is entitled to a 1982 priority date turns on whether Mr. *654 Reiffin is correct that his 1982 application teaches “multithreading.” The examiner found that the 1982 application did not describe multithreading. The examiner therefore concluded that the '604 patent’s priority date was in 1994, when Mr. Reiffin filed the continuation application that led to that patent. Accordingly, the examiner rejected many of the claims of the '604 patent in light of prior art references that postdated the 1982 application but predated the 1994 application.

On appeal, the Board of Patent Appeals and Interferences agreed with the examiner that Mr. Reiffin did not disclose mul-tithreading in 1982. In so finding, the Board relied on the definition of multith-reading in the '604 patent specification, which states:

The term “multithreading” is used in this specification in its ordinary generally understood sense to mean the concurrent asynchronous preemptive time-sliced execution of a plurality of threads of instructions located within the same software program, controlled by a clock or timer which periodically activates the interrupt operation of the central processor. That is, each interrupt preempts an executing thread after the thread has executed at most for a brief timeslice during which the thread may have performed only a portion of its task. Control of the processor is thereby taken away from the preempted thread, and control then passes to an interrupt service routine which then passes control to another thread to invoke the latter for execution during the next timeslice. Control is thereafter returned to the preempted thread to enable the latter to resume execution at the point where it was previously interrupted. The term “multithreading” in each claim is to be understood as defined by the respective limitations reeked [sic: recited] in that particular claim.
The operation termed “multithread-ing” provides that control of the processor is thus transferred repeatedly back and forth between the threads so rapidly that the threads are run substantially simultaneously. The threads may thus execute incrementally and piecewise with their successive task portions executed alternately in a mutually interleaved relation and with each thread executed during its respective series of spaced timeslices interleaved with the timeslices of at least one other thread.

'604 patent, col. 1,11. 27-53. Based on that definition, the Board determined that in a multithreading system each thread must be interruptible. While concluding that the “compiler” Mr. Reiffin had disclosed in his 1982 application was interruptible, the Board found that the “editor” was not. The Board also concluded that the editor and compiler that Mr. Reiffin disclosed in 1982 do not satisfy the definition of mul-tithreading because they do not execute concurrently and are not located within the same software program.

Based on its determination that Mr. Reiffin had not disclosed multithreading, the Board considered whether the patent’s claims were valid over art that predated 1994. The Board held most of the claims invalid as anticipated or obvious in light of the OS/2 operating system as described by Jeffrey Krantz et al., OS/2 Features, Functions and Applications (1988) (“Krantz”). The Board also determined that some claims were invalid for failing to comply with the written description requirement of 35 U.S.C.

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340 F. App'x 651, Counsel Stack Legal Research, https://law.counselstack.com/opinion/in-re-reiffin-family-trust-cafc-2009.