Ge Solid State, Inc. v. Director, Division of Taxation

11 N.J. Tax 320
CourtNew Jersey Tax Court
DecidedSeptember 14, 1990
StatusPublished
Cited by5 cases

This text of 11 N.J. Tax 320 (Ge Solid State, Inc. v. Director, Division of Taxation) is published on Counsel Stack Legal Research, covering New Jersey Tax Court primary law. Counsel Stack provides free access to over 12 million legal documents including statutes, case law, regulations, and constitutions.

Bluebook
Ge Solid State, Inc. v. Director, Division of Taxation, 11 N.J. Tax 320 (N.J. Super. Ct. 1990).

Opinion

ANDREW, J.T.C.

This is a sales and use tax case in which plaintiff, GE Solid State, Inc., challenges a tax deficiency assessed by the Director of the Division of Taxation relative to purchases of photomask machinery and photoplates by plaintiffs predecessor, the Solid State Division of RCA Corporation, during the assessment period of July 1, 1981 through June 30, 1984.

Plaintiff claims the purchases were exempt from sales and use tax pursuant to an exemption provision in the Sales and Use Tax Act, N.J.S.A. 54:32B-1 et seq., for machinery, apparatus or equipment used in the production of tangible personal property at N.J.S.A. 54:32B-8.13a. Of course, the Director asserts that the purchases by plaintiffs predecessor did not meet the requirements of the exemption provision.

The facts in this proceeding were presented in an extensive stipulation supplemented by trial as to those areas in which the parties could not agree.

Plaintiff, GE Solid State, Inc., a Delaware corporation, with its principal place of business located in Somerville, New Jersey, is the successor in interest to RCA Corporation. During the assessment period at issue, the Solid State Division of RCA Corporation was engaged in, among other things, the business of manufacturing and selling integrated circuits or “chips.” Integrated circuits are rectangular transistor circuits made of silicon, several times smaller than a thumbnail, containing anywhere from 100 to 10 million transistors. The transistors [324]*324are all made directly on the chip and are connected together into a single circuit. The integrated circuit may have anywhere from 7 to 17 levels or layers of various elements.

The process which eventuates in integrated circuits, packaged and ready for shipment to plaintiff’s customers, can be separated into four phases. The first is research and development in which design engineers and layout designers, aided by a computer, create a prototype of the 7 to 17 levels of a proposed integrated circuit. The prototype consists of 7 to 17 photo-masks. A photomask is a four- or five-inch glass plate, called a photoplate, which is covered with layers of chrome, chrome oxide and photoresist, which after processing, contains the pattern of one level of the components of the integrated circuits. Once research and development develops a prototype set of 7 to 17 photomasks, the photomask set is sent to plaintiff’s manufacturing facility in either Findlay, Ohio or West Palm Beach, Florida to actually produce a number of integrated circuits for testing. If the “chips” are suitable for the intended purpose, the product design is considered ready for manufacture.

The second phase of plaintiff’s operations involves the production of photomasks which takes place in Somerville, New Jersey. The parties agree that photomasks are indispensable to the manufacturing of integrated circuits. As previously noted, the photomasks contain the patterns of the integrated circuits and are used, through a photographic-like pattern transfer process called photolithography, to transfer those patterns to a silicon wafer (which operation takes place in plaintiff’s third area of operations, i.e., silicon wafer manufacture or fabrication).

In its photomask operation, plaintiff produces four types of photomasks: (1) projection masters, (2) contact prints, (3) print masters and (4) reticles. Only the first two, projection masters and contact prints, are used in the third area of operations, i.e., [325]*325silicon wafer fabrication, to actually make integrated circuits.1 The last two, print masters and reticles, remain in the photo-mask operation to produce additional projection masters and contact prints.

Before any discussion of plaintiffs photomask operation is offered, it is helpful to view the operation schematically.

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In the photomask process, guided by a computer tape, the design of one level or layer of an integrated circuit is produced [326]*326on a photoplate by either a MEBES machine (an electron beam system) or a TRE machine (an optical exposure system) by means of either electron beams or optical exposure. After the plate is removed from either machine, it then goes through a number of chemical processes, the result of which is a finished photomask that contains the pattern of one level of an integrated circuit.

As the above schematic demonstrates, the MEBES machine produces three types of photomasks, i.e., projection masters, print masters and reticles. The projection master is sent to the operation known as silicon .water fabrication for actual production of the integrated circuits. The second type of photomask, a print master, is used in conjunction with a contact printer machine to make other photomasks called contact prints. The contact prints, like the projection masters, are used in the silicon wafer fabrication operation.

The third type of photomask produced by the MEBES machine is a reticle. A reticle is different from the other types of photomasks because the patterns on the reticle are ten times larger than actual size. The primary function of a reticle is to make other projection masters or print masters by means of a step-and-repeat machine. Reticles are not employed in the wafer fabrication operation, but instead, remain in plaintiffs photomask operation.

Next, as the above schematic diagram reveals, the TRE machine produces only reticles. In turn, however, as previously stated, a reticle, in conjunction with a step-and-repeat machine, can produce both print masters and projection masters. The print masters, as the schematic diagram demonstrates, can then be employed with a contact printer machine to produce contact prints. Again, only contact prints and projection masters are used in wafer fabrication while print masters and reticles are employed only in plaintiffs photomask operation.

As already noted, a set of 7 to 17 different photomasks is required in order to create all of the levels of an integrated circuit. Therefore, the MEBES machine or TRE machine pro[327]*327cess must be repeated 7 to 17 times in order to produce a photomask set to be used in the manufacture of one type of integrated circuit. Plaintiff does not sell any of its photomasks to other integrated circuit manufacturers.

The third area of plaintiff’s operations is the manufacture of the integrated circuit or wafer fabrication. Certain of plaintiff’s wafer fabrication operations are conducted at its facility in Somerville, New Jersey, the same location as its photomask operation. Most of plaintiff’s wafer fabrication operations, however, take place at its manufacturing facilities in Findlay, Ohio, Mountaintop, Pennsylvania and West Palm Beach, Florida.

According to the stipulation of facts submitted by the parties, the raw material of the integrated circuit is a small, usually four or five inches in diameter, round, thin wafer of silicon with layers of various materials such as aluminium. Wafer fabrication begins when the wafer is placed in a rinser-dryer machine. Thereafter, the silicon wafer makes its way into a printer machine of which the photomask is the most essential element. The photomask does not become a component part of the integrated circuit. Instead, through the printer, the designs or patterns on the photomasks are transferred to the silicon wafer which will contain the final integrated circuit.

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11 N.J. Tax 320, Counsel Stack Legal Research, https://law.counselstack.com/opinion/ge-solid-state-inc-v-director-division-of-taxation-njtaxct-1990.