Collabo Innovations, Inc. v. Qualcomm Incorporated; Qualcomm Technologies, Inc.

• Court: District Court, W.D. Texas
• Decided: October 7, 2025
• Docket: 6:24-cv-00472
• Status: Unknown

Opinion

IN THE UNITED STATES DISTRICT COURT FOR THE WESTERN DISTRICT OF TEXAS WACO DIVISION

COLLABO INNOVATIONS, INC., § Plaintiff, § § -v- § 6:24-CV-00472-ADA § QUALCOMM INCORPORATED § QUALCOMM TECHNOLOGIES, INC., § Defendants. § §

CLAIM CONSTRUCTION ORDER AND MEMORANDUM IN SUPPORT THEREOF Before the Court are the Parties’ claim construction briefs: Defendants Qualcomm Incorporated and Qualcomm Technologies, Inc.’s Opening and Reply briefs (ECF Nos. 32 and 35, respectively) and Plaintiff’s Response and Sur-Reply briefs (ECF Nos. 33 and 36, respectively). The Court provided preliminary constructions for the disputed terms one day before the hearing. The Court held the Markman hearing on June 2, 2025. ECF No. 42. During that hearing, the Court informed the Parties of the final constructions for the disputed terms. Id. This Order does not alter any of those constructions.

I. DESCRIPTION OF THE ASSERTED PATENTS Plaintiff asserts U.S. Patent No. 7,930,575, which is entitled “Microcontroller for controlling power shutdown process.” The specification describes that “[t]he present invention relates to microcontrollers, and in particular, to a technique of suppressing current consumption in time of stand-by in a power shutdown mode in which a program can proceed.” ’575 Patent at 1:13–16. The patent describes that “a main object of the present invention to provide a microcontroller capable of easily and rapidly evacuating and restoring information necessary in proceeding with a program when realizing a standby state in which internal operation voltage supply is shutdown, a state in which an internal operation voltage is lowered, or the like.” Claim 1 recites (annotations added): 1. A microcontroller comprising: [a] a CPU; [b] a power supply unit arranged between the CPU and a power supply device for supplying power to the CPU; [c] a power supply control unit for controlling the CPU and the power supply unit; [d] an information holding unit for holding information evacuated from the CPU, the information being necessary in proceeding with a program; and [e] a clock generator; wherein: [f] the power supply control unit outputs a shutdown request signal to the CPU in response to an occurrence of a power shutdown factor, [g] the CPU, upon receiving the shutdown request signal, executes a power shutdown microprogram, evacuates the information necessary in proceeding with the program to the information holding unit, and outputs an evacuation completed signal to the power supply control unit after evacuation is completed, [h] the power supply control unit, upon receiving the evacuation completed signal, outputs a power shutdown control signal to the power supply unit, [i] the power supply unit shuts down power supply to the CPU upon receiving the power shutdown control signal from the power supply control unit, [j] the power supply control unit, upon receiving the evacuation completed signal, outputs a clock stop control signal to the clock generator, [k] the power supply control unit outputs a power supply control signal to the power supply unit in response to an occurrence of a power supply restoration factor, [l] the power supply unit, upon receiving the power supply control signal, starts to supply power to the CPU, [m] the power supply control unit outputs a restoration request signal to the CPU and outputs a clock supply control signal to the clock generator when a supplied power supply voltage is stabilized, [n] the clock generator, upon receiving the clock supply control signal, restarts to supply an operation clock, and [o] the CPU, upon receiving the restoration request signal, executes a power supply restoration microprogram, restores the information necessary in proceeding with the program and evacuated in the information holding unit in time of power shutdown, and then branches a process to an address indicated by a program counter to continue program execution from a shutdown state. II. LEGAL STANDARD A. General principles The general rule is that claim terms are generally given their plain-and-ordinary meaning. Phillips v. AWH Corp., 415 F.3d 1303, 1312 (Fed. Cir. 2005) (en banc); Azure Networks, LLC v. CSR PLC, 771 F.3d 1336, 1347 (Fed. Cir. 2014), vacated on other grounds, 575 U.S. 959, 959

(2015) (“There is a heavy presumption that claim terms carry their accustomed meaning in the relevant community at the relevant time.”) (internal quotation omitted). The plain-and-ordinary meaning of a term is the “meaning that the term would have to a person of ordinary skill in the art in question at the time of the invention.” Phillips, 415 F.3d at 1313. The “only two exceptions to [the] general rule” that claim terms are construed according to their plain-and-ordinary meaning are when the patentee (1) acts as his/her own lexicographer or (2) disavows the full scope of the claim term either in the specification or during prosecution. Thorner v. Sony Computer Ent. Am. LLC, 669 F.3d 1362, 1365 (Fed. Cir. 2012). The Federal Circuit has counseled that “[t]he standards for finding lexicography and disavowal are exacting.”

Hill-Rom Servs., Inc. v. Stryker Corp., 755 F.3d 1367, 1371 (Fed. Cir. 2014). To act as his/her own lexicographer, the patentee must “clearly set forth a definition of the disputed claim term” and “‘clearly express an intent’ to [define] the term.” Thorner, 669 F.3d at 1365. “Like the specification, the prosecution history provides evidence of how the PTO and the inventor understood the patent.” Phillips, 415 F.3d at 1317. “[D]istinguishing the claimed invention over the prior art, an applicant is indicating what a claim does not cover.” Spectrum Int’l, Inc. v. Sterilite Corp., 164 F.3d 1372, 1379 (Fed. Cir. 1998). The doctrine of prosecution disclaimer precludes a patentee from recapturing a specific meaning that was previously disclaimed during prosecution. Omega Eng’g, Inc. v. Raytek Corp., 334 F.3d 1314, 1323 (Fed. Cir. 2003). “[F]or prosecution disclaimer to attach, our precedent requires that the alleged disavowing actions or statements made during prosecution be both clear and unmistakable.” Id. at 1325–26. Accordingly, when “an applicant’s statements are amenable to multiple reasonable interpretations, they cannot be deemed clear and unmistakable.” 3M Innovative Props. Co. v. Tredegar Corp., 725 F.3d 1315, 1326 (Fed. Cir. 2013).

A construction of “plain and ordinary meaning” may be inadequate when a term has more than one “ordinary” meaning or when reliance on a term’s “ordinary” meaning does not resolve the parties’ dispute. O2 Micro Int’l Ltd. v. Beyond Innovation Tech. Co., 521 F.3d 1351, 1361 (Fed. Cir. 2008). In that case, the Court must describe what the plain-and-ordinary meaning is. Id. “Although the specification may aid the court in interpreting the meaning of disputed claim language . . ., particular embodiments and examples appearing in the specification will not generally be read into the claims.” Constant v. Advanced Micro-Devices, Inc., 848 F.2d 1560, 1571 (Fed. Cir. 1988). “[I]t is improper to read limitations from a preferred embodiment described

in the specification—even if it is the only embodiment—into the claims absent a clear indication in the intrinsic record that the patentee intended the claims to be so limited.” Liebel-Flarsheim Co. v. Medrad, Inc., 358 F.3d 898, 913 (Fed. Cir. 2004). Although extrinsic evidence can be useful, it is “less significant than the intrinsic record in determining ‘the legally operative meaning of claim language.’” Phillips, 415 F.3d at 1317 (quoting C.R. Bard, Inc. v. U.S. Surgical Corp., 388 F.3d 858, 862 (Fed. Cir. 2004)). Technical dictionaries may be helpful, but they may also provide definitions that are too broad or not indicative of how the term is used in the patent. Id. at 1318. Expert testimony may also be helpful, but an expert’s conclusory or unsupported assertions as to the meaning of a term are not. Id. B. Claim differentiation Under the doctrine of claim differentiation, a court presumes that each claim in a patent has a different scope. Phillips, 415 F.3d at 1314–15. The presumption is rebutted when, for example, the “construction of an independent claim leads to a clear conclusion inconsistent with a dependent claim.” Id. The presumption is also rebutted when there is a “contrary construction

dictated by the written description or prosecution history.” Seachange Int’l., Inc. v. C-COR, Inc., 413 F.3d 1361, 1369 (Fed. Cir. 2005). The presumption does not apply if it serves to broaden the claims beyond their meaning in light of the specification. Intellectual Ventures I LLC v. Motorola Mobility LLC, 870 F.3d 1320, 1326 (Fed. Cir. 2017). C. Indefiniteness “[I]ndefiniteness is a question of law and in effect part of claim construction.” ePlus, Inc. v. Lawson Software, Inc., 700 F.3d 509, 517 (Fed. Cir. 2012). Patent claims must particularly point out and distinctly claim the subject matter regarded as the invention. 35 U.S.C. § 112, ¶ 2. A claim, when viewed in light of the intrinsic evidence, must “inform those skilled in the art about

the scope of the invention with reasonable certainty.” Nautilus Inc. v. Biosig Instruments, Inc., 572 U.S. 898, 910 (2014). If it does not, the claim fails § 112, ¶ 2 and is therefore invalid as indefinite. Id. at 901. Whether a claim is indefinite is determined from the perspective of one of ordinary skill in the art as of the time the application was filed. Id. at 911. III. LEGAL ANALYSIS A. Term #1: “microcontroller”

Term Plaintiff’s Proposed Defendants’ Proposed Construction Construction #1: “microcontroller” Plain and ordinary meaning “a single integrated chip as opposed to a set of multiple U.S. Patent No. 7,930,575, chips (a “chipset”)” Claim 1

Proposed by Both Sides

The Parties’ Positions: Defendants first contend that Plaintiff “narrowed the scope to ‘a single integrated chip/not a chipset,’ and expressly disclaimed chipsets [i.e., comprising multiple chips],” and that Defendants’ proposed construction “incorporates clear and unmistakable representations to the PTAB that the claimed ‘microcontroller’ is a ‘single integrated chip/not a chipset.’” Id. (citing Opening, Ex. 1 at 18, Ex. 2 at 15). More specifically, Defendants contend that, in the POPRs for two IPRs, Plaintiff described that a “chip” was “single piece of silicon[,]” “[s]ometimes referred to as a die.” Id. at 4–5 (citing Opening, Ex. 10 at 166, Ex. 11 at 110, Ex. 12, at 113, Ex. 1 at ¶¶ 31–36). Defendants contend that Plaintiff also argued that the claims excluded multi-chip systems or “chipsets.” Id. at 5–7 (quoting Opening, Ex. 6 at 23–24 (“As shown above, the ‘board’ is not a single ‘chip,’ but rather is a set of multiple chips (a ‘chipset’) . . . . Because Jahagirdar’s multi-chip system is not integrated on a single chip, it does not teach a ‘microcontroller’ under either party’s construction.” (emphases in Defendants’ brief)); Ex. 7 at 17 (“Chung’s multi-chip system is not integrated on a single chip, and thus does not teach a ‘microcontroller’ under either party’s construction.” (emphasis in Defendants’ brief)). Based on that, Defendants contend that Plaintiff “expressly disclaimed a construction of “microcontroller” that includes chipsets or multi-chip systems.” Id. at 6–7 (citing Spectrum Int’l, Inc. v. Sterile Corp., 164 F.3d 1372, 1378–79 (Fed. Cir. 1998)). Defendants contend that because the PTAB relied on Plaintiff’s disclaimer, Plaintiff is estopped from arguing otherwise. Id. at 7. Defendants contend that Each of the elements of judicial estoppel is satisfied here: first, [Plaintiff] previously argued that a microcontroller was a “single integrated chip,” a position inconsistent with its opposition to [Defendants’] proposed construction; second, the PTAB accepted that position; and, third, there is no reason to believe [Plaintiff’s] change of position is inadvertent.

Id. at 7–8 (citing cases). In its response, Plaintiff contends that its proposed construction “maintains the same claim scope that the [PTAB] relied on in the IPR petitions.” Response at 2. Plaintiff contends that Defendants’ proposed construction “improperly imports language and imputes unwarranted meaning from the IPR decisions that should not be part of the construction of the term ‘microcontroller[,]’” and also includes language (“as opposed to”) that is “akin to an example and improper.” Id. at 2–3 (citing cases). Plaintiff contends that, in the first IPR, it “explained at length the difference between a single chip and the various chips dispersed across an entire PC board in Jahagirdar.” Id. at 3 (citing Opening, Ex. 6 at 16). Plaintiff contends that, while it “did not assert that integrating multiple chips into a larger integrated chip would cause that single chip to not be ‘a microcontroller[,]’” Defendants’ proposed construction “seeks to introduce a negative limitation that a single integrated chip as opposed to a set of multiple chips (a ‘chipset’).” Id. (citing Opening at 3) (emphases in Plaintiff’s brief). In the first IPR, Petitioner argued that “Jahagirdar’s components can be located on the same chip[,]” thus meeting the microcontroller limitation. Id. (citing Opening, Ex. 1 at 28). But Plaintiff contends that “[s]imply because Jahagirdar acknowledges different types of integrated circuits it does not mean that Jahagirdar discloses a single integrated circuit or chip that disclosed all of the components needed to satisfy claim 1.” Id. at 4 (citing Opening, Ex. 6 at 24– 25). Based on that, Plaintiff contends that the PTAB agreed with the parties that “a microcontroller must be a single, integrated chip[,]” but that Petitioner had “not shown sufficiently that Jahagirdar’s system resides on a single chip” and that “the record evidence does not show

sufficiently that Jahagirdar teaches its components ‘can be located on the same chip.’” Id. (citing Opening, Ex. 8 at 7, 11). Plaintiff contends that, in the second IPR, Chung did not teach “a microcontroller” because “the cited components were a ‘multi-chip system’ dispersed throughout a laptop computer and ‘not integrated on a single chip.’” Id. (citing Opening, Ex. 7 at 16–17). Plaintiff contends that the PTAB agreed that Petitioner had “not shown sufficiently that Chung’s system resides on a single chip” and that it “recognized that ordinary meaning of ‘microcontroller’ is a single, integrated chip[.]” Id. (citing Opening, Ex. 9 at 11). Plaintiff contends that that definition is “not ‘opposed to a set of multiple chips’ if they were alleged to be included in one microcontroller.” Id.

Plaintiff contends that Defendants’ proposed construction “rewrite[s] the term ‘microcontroller’ to use different words and import improper negative limitations introduce ambiguity and invite further dispute.” Id. at 6. Plaintiff contends that “‘what is clear from the arguments and decisions in the IPRs is that when multiple chips or chipsets’ are not included in a single ‘microcontroller,’” the prior art does not disclose a “microcontroller.” Id. With respect to Defendants’ expert’s opinion that a chip is a single piece of silicon or a die, or that “[a] package may contain two or more dies depending on the functional circuits[,]” Plaintiff contends that “[n]one of these observations are at odds with the positions [Plaintiff] has taken before this Court or in the IPRs[.]” Id. at 6–7. Based on that, Plaintiff contends that the additional limitations that in Defendants’ proposed construction “add nothing to clarify the scope, and perhaps more notably have no justification from the specification.” Id. at 7. In its reply, Defendants first contends that Plaintiff “cannot walk away from its clear and unmistakable disclaimer.” Reply at 1. More specifically, Defendants contend that Plaintiff told the PTAB that its construction “requires the ‘microcontroller’ to be an [sic] single chip.” Id.

(quoting Opening, Ex. 6 at 27) (emphases in Defendants’ brief). With respect to the Jahagirdar prior art reference, Defendants contend that Plaintiff argued that “the ‘board’ is not a single ‘chip,’ but rather is a set of multiple chips (a ‘chipset’)…Because Jahagirdar’s multi-chip system is not integrated on a single chip, it does not teach a ‘microcontroller’ under either party’s construction.” Id. (quoting Opening, Ex. 6 at 23–24). With respect to the Chung prior art reference, Defendants contend that Plaintiff argued that “Chung does not teach that its system resides on a single chip. Thus, it does not teach a ‘microcontroller.’ Chung teaches a multi-chip system that includes a system controller for use in a computer.” Id. at 2 (quoting Opening, Ex. 7 at 13). Defendants contend that the PTAB agreed with Plaintiff that “a microcontroller must be a

single, integrated chip,” and is not a multi-chip system. Id. (citing Opening, Ex. 8 at 7, 11). Defendants contend that while Plaintiff argues that “[Plaintiff] has never asserted, and the Board never found, that a ‘microcontroller’ excludes ‘a set of multiple chips’ or ‘(a chipset)[,]’” Plaintiff “clearly argued that a ‘microcontroller’ does not include a set of multiple chips or a chipset.” Id. Defendants contend that Plaintiff argument that “a single, integrated chip” can include a “package” containing multiple chips packaged in a single unit is incorrect and has no support. Id. Defendants first contend that Plaintiff’s argument “wrongly conflates ‘chip’ and ‘package[.]” Id. Defendants further contend that Plaintiff’s argument ignores its prior arguments to the PTAB that a “microcontroller” excludes “a set of multiple chips,” irrespective of whether those chips are packaged individually or collectively. Id. More specifically, Defendants contend that given that Plaintiff argued to the PTAB that “chip” means “integrated circuit” and a “single, integrated chip” means a “single, integrated circuit,” Plaintiff disclaimed multi-chip packages. Id. at 3. Plaintiff also argued in prior litigation that “‘[c]hip’ can be used to refer to a piece of bare silicon, or to the silicon and the circuitry placed on the silicon.” Id. (quoting Reply, Ex. 15 at 2) (emphasis in

Defendants’ brief). Defendants further contend that Plaintiff “has consistently referred to the ‘microcontroller’ as ‘a chip,’ ‘an integrated circuit,’ and ‘single, integrated chip’—each in the singular thereby underscoring its prior position that all components of the microcontroller should be on a single piece of silicon, i.e., a single, integrated chip, as it argued to PTAB.” Id. (emphases in Defendants’ brief). Defendants contend that “as opposed to a set of multiple chips (a ‘chipset’)” in its proposed construction does not provide an example, but rather “identifies the claim scope surrendered by [Plaintiff] before the PTAB.” Id. Defendants contend that “negative limitations are entirely appropriate to enforce such disclaimers.” Id. at 3–4 (citing RFID Tracker, Ltd. v. Wal-Mart Stores,

Inc., 342 F. Appx. 628, 632 (Fed. Cir. 2009)). In its sur-reply, Plaintiff contends that it “distinguished two pieces of prior art for failing to disclose ‘a microcontroller’ as required by the ’575 patent in the IPRs.” Sur-Reply at 1. With respect to the Jahagirdar prior art reference, Plaintiff contends that “disparate components spread across a PC board … could not be the claimed ‘microcontroller.’” Id. (citing Opening, Ex. 6 at 23–25). With respect to the Chung prior art reference, Plaintiff similarly contends that the “the four integrated circuit chips” disclosed by Chung were “not integrated on a single chip.” Id. (citing Opening, Ex. 7 at 16–17). Plaintiff contends that the “plain and ordinary meaning of a ‘microcontroller’ does not include multiple components spread across a laptop or PC board.” Id. at 2. Plaintiff contends that while it “initially” proposed that “microcontroller” should be construed as “an integrated circuit” in the prior district court case, it “acknowledged that construction did not necessarily mean ‘only one circuit’ on a chip but rather that the required

elements were present on that chip.” Id. Plaintiff contends that, after the conclusion of the two IPRs, the Court construed “microcontroller” as plain-and-ordinary meaning. Id. Plaintiff contends that Defendants do not “address the substance of [Plaintiff’s] arguments in the IPRs or the Court’s construction following the conclusion of both IPRs.” Id. Plaintiff contends that Defendants argue that Plaintiff’s references to a “microcontroller” as “a chip,” “an integrated circuit,” and a “single, integrated chip,” means that “all components of the microcontroller should be on a single piece of silicon” which Defendants’ expert “then extends to include a single ‘die.’” Id. (citing Reply at 3, n.1). Plaintiff contends that it did not use these terms “to distinguish the multiple chips spread across a laptop or PC board in the IPRs” and

“neither the word ‘silicon’ nor ‘die’ appear anywhere in the IPR responses.” Id. at 2–3. Based on that, Plaintiff contends that “there cannot be any clear and unequivocal disclaimer, and if there is a disclaimer, it must be “narrowly tailored … to exclude only claim scope that has been ‘clearly and unmistakably’ disclaimed.” Id. at 3 (citing Omega Eng’g, 334 F.3d at 1324–26). Plaintiff contends that its expert explained that a “microcontroller” may be a single packaged unit comprising multiple pieces of silicon. Id. Plaintiff contends that the only distinction it was making was that a “microcontroller” could not comprise multiple packaged units. Id. The Court’s Analysis: After reviewing the parties’ arguments and considering the applicable law, the Court agrees with Plaintiff that this term should be construed according to its plain-and-ordinary meaning for the reasons that follow. First, the “heavy presumption” is that terms should be construed according to their plain-and-ordinary meaning. Azure Networks, 771 F.3d at 1347.

Second, the only two exceptions to the general rule that a term should be construed as having its plain-and-ordinary meaning are lexicography and disclaimer. Thorner, 669 F.3d at 1365. Defendants do not allege lexicography, but do allege that the patentee made a disclaimer during the IPRs. The Court disagrees. The dispute between the parties boils down to whether Plaintiff’s IPR statements that a “microcontroller” is a “single integrated chip” meant that (1) Plaintiff disclaimed “microcontrollers” that had multiple silicon dies within a single package (Defendants’ position) or (2) “microcontrollers” include packages that contain multiple silicon dies (Plaintiff’s position). In other words, in the context of Plaintiff’s IPR statements, Defendants’ position is that “chip” is synonymous with “die” or “silicon,” while Plaintiff’s position is that “chip” is also synonymous with the entire packaged unit, i.e., the package and die(s) therein.1

The Jahagirdar prior art reference disclosed a system that used multiple, physically distinct chips. See, e.g., Opening, Ex. 6 at 23. Plaintiff argued that a “board” comprising multiple, physically distinct chips “is not a single ‘chip,’ but rather is a set of multiple chips (a ‘chipset’)” and “[b]ecause Jahagirdar’s multi-chip system is not integrated on a single chip, it does not teach

1 While Defendants argue that Plaintiff made a disclaimer during the IPRs, Defendants’ argument could also be characterized as an O2 Micro dispute. More specifically, Defendants’ expert, Dr. Annavaram, opines that the definition of “chip” is that it is limited to a single silicon die; in other words, the plain-and-ordinary meaning of “chip” is limited to a single die. Opening, Ex. 1 at ¶¶ 34–36. By contrast, Plaintiff argues that a “chip” is not limited to a single die. Sur-Reply at 2. Rather, Plaintiff cites its expert for the proposition that “a microcontroller is typically offered as a single packaged unit without any indication of how many die or pieces of silicon may be included.” Id. at 3 (citing ECF No. 33-1 at ¶ 39). Therefore, the parties arguably have proposed two different plain-and-ordinary meanings for “chip.” That said, the Court analyzes the parties’ dispute from the perspective of disclaimer, but the Court’s conclusion would be the same if analyzed as an O2 Micro dispute. a ‘microcontroller’ under either party’s construction.” Id. at 23–24. Based on the disclosures in Jahagirdar and Plaintiff’s IPR statements regarding Jahagirdar, the Court concludes that Plaintiff did not disclaim chips with multiple dies in a single package. Rather, Plaintiff’s statement simply highlighted the difference between the multiple, physically distinct chips in Jahagirdar and a single chip in the ’575 Patent. There is no indication that Plaintiff “clear[ly] and unmistakab[ly]”

disclaimed single chips with multiple dies therein. Omega Eng’g, 334 F.3d at 1325. The Chung prior art reference disclosed a multi-chip system where “[t]he principal management control functions for the system of FIG. 1 are performed by four integrated circuit chips.” See, e.g., Opening, Ex. 7 at 17. Plaintiff argued that “Chung’s multi-chip system is not integrated on a single chip, and thus does not teach a “microcontroller” under either party’s construction.” Id. Based on the disclosures in Chung and Plaintiff’s IPR statements regarding Chung, the Court concludes that Plaintiff again did not disclaim chips with multiple dies in a single package. Rather, Plaintiff’s statement simply highlighted the difference between the multiple, physically distinct chips in Chung and a single chip in the ’575 Patent. There is no indication that

Plaintiff “clear[ly] and unmistakab[ly]” disclaimed single chips with multiple dies therein. Omega Eng’g, 334 F.3d at 1325. Third, the Court agrees with Plaintiff that the plain-and-ordinary meaning of “chip” is also synonymous with the entire packaged unit (and, as explained immediately above, Plaintiff did disclaim the plain-and-ordinary meaning of “chip”). While the Court agrees with Defendants that “chip” may refer to a die, Plaintiff’s expert’s experience that “a microcontroller is typically offered as a single packaged unit without any indication of how many die or pieces of silicon may be included” is persuasive as it appears to align with how engineers refer to a “chip.”2 Based on that,

2 The Court’s appointed technical advisor in this case, who is a POSITA under both parties’ proposed level of ordinary skill as of the priority date of the ’575 Patent, agrees with Plaintiff’s expert that, in his experience, as of the priority because a POSITA would understand that the plain-and-ordinary meaning of “chip” includes the entire packaged unit, Plaintiff’s IPR statements are consistent with the plain-and-ordinary meaning of “chip.” Fourth, the Court agrees with Plaintiff that the language of Claim 1 tends to support that “microcontroller” is not limited to a “die” as Defendants contend, but includes the entire packaged

unit. More specifically, the parties agree that the preamble of Claim 1 (“A microcontroller comprising”) is limiting. ECF No. 37 at 2. As such, the claimed microcontroller contains the components specified in the body of Claim 1, i.e., a CPU, a power supply unit, a power supply control unit, an information holding unit, and a clock generator. Given that the claim language does not recite that these components must be integrated together on the same die and Defendants have not provided any evidence that those components are necessarily integrated together on the same die or that a POSITA would understand that it was customary to do so, the Court declines to limit the microcontroller to a particular implementation, i.e., a single die. Fifth, the Court disagrees that Plaintiff is estopped from arguing against Defendants’

proposed construction. As described above, the Court concluded that Plaintiff did not disclaim single chips with multiple dies therein when it argued, e.g., that “both constructions require the microcontroller to be on a single integrated chip.” Furthermore, the Court concludes that “chip” is also synonymous with the entire packaged unit. Based on this, because Plaintiff did not effectively argue for Defendants’ proposed construction during prosecution, it is not estopped from arguing against Defendants’ proposed construction in this case.

date of the patent, a “chip” may refer to the entire packaged unit, which may have one or more dies. Opening, Ex. 1 at ¶ 24 (Defendants’ expert’s proposed level of ordinary skill in the art), ECF No. 33-1 at ¶ 30 (Plaintiff’s expert’s proposed level of ordinary skill in the art). Therefore, for the reasons described above, the Court finds that Plaintiff did make a disclaimer during prosecution and the term should be construed according to its plain-and-ordinary meaning. B. Term #2: “microprogram”

Term Plaintiff’s Proposed Defendants’ Proposed Construction Construction #2: “microprogram” Plain and ordinary meaning “a control program (or a microcode) that runs at the U.S. Patent No. 7,930,575, lowest level of the hardware Claim 1 to control internal source of the CPU to execute Proposed by Defendants command, interrupt processing, and the like, and is held entirely within the CPU as opposed to a program that is held in main memory until executed”

The Parties’ Positions: Defendants contend that their proposed construction “stems from the clear teachings of the ’575 Patent and [Plaintiff’s] own clarifying statements made before the PTAB[.]” Opening at 8. Defendants contend that their proposed construction “starts with the disclosures in the specification of the ’575 Patent and then incorporates [Plaintiff’s] distinguishing characteristics of the claimed ‘microprogram’ that [Plaintiff] provided in its POPRs.” Id. at 9. Defendants contend that the specification recites that “[t]he microprogram herein refers to the control program for controlling internal sources of the CPU 1 in order to execute command, interrupt processing, and the like.” Id. (citing ’575 Patent at 9:46–49). Defendants contend that this description “comports with the general understanding of ‘microprogram’ that a person of ordinary skill in the art reading the specification would have had at the time of the purported invention.” Id. at 9–10 (citing Opening, Ex. 1 at ¶ 55). Defendants contend that their expert opined that a “microprogram” “refers to a particular type of program that is used to control a CPU’s hardware resources and implement higher-level instructions.” Id. at 10 (citing Opening, Ex. 1 at ¶¶ 40–53). Defendants contend that, during the IPRs, Plaintiff “further refined the meaning of ‘microprogram’ as used in the ’575 Patent.” Id. More specifically, Defendants contend that the

patentee added three characteristics to the meaning of “microprogram” to further narrow its meaning, namely: (1) “run[] at the lowest level of the hardware” and (2) be “held entirely within the CPU,” as opposed to (3) being a program “held in the main memory of the computer system until executed by the CPU.” Id. (citing Opening, Ex. 6 at 54–55; Ex. 7 at 28). With respect to the first characteristic, Defendants contend that Plaintiff “explained to the PTAB that a ‘microprogram is a special program that runs at the lowest level of the hardware.” Id. at 10–11 (citing Opening, Ex. 6 at 54, Ex. 7 at 28). Defendants contend that a POSITA would understand that a “microprogram” is “a particular type of program that serves to facilitate the operation of a system’s hardware at the lowest level of operation.” Id. at 11 (citing Opening, Ex.

1 at ¶¶ 40–53, 63). With respect to the second characteristic, Defendants contend that Plaintiff “further distinguished the term from a mere ‘program’ by explaining that the claimed ‘microprogram,’ or microcode, ‘is held entirely within the CPU.’” Id. (citing Opening, Ex. 6 at 55, Ex.7 at 28). Defendants contend that a “microprogram” is “a means through which some CPUs may implement the macro-instructions of a higher-level program and is contained entirely within the CPU” and that “[a] CPU responding to macroinstructions using microprograms sidesteps the need to fetch additional code from outside the CPU.” Id. (citing Opening, Ex. 1 at ¶¶ 40–53, 63). Defendants contend that figures in the ’575 Patent depict microprograms held entirely within the CPU. Id. (citing ’575 Patent at Figures 1, 6, 8, 9, 10, 13, 14, 19, 23). With respect to the third characteristic, Defendants contend that Plaintiff argued that, unlike “macro-instructions,” which are held in main memory until executed by the CPU, a “microprogram” is not held in main memory. Id. at 12 (citing Opening, Ex. 6 at 54, Ex. 7 at 28,

Ex. 13). Defendants contend that, during the IPR, Plaintiff contends that “the disclosure of a program in Chung did not amount to a disclosure of a microprogram—the ‘microprogram’ requires a specific kind of program that comports with the characteristics identified by [Plaintiff] in its POPRs.” Id. at 13 (emphases in Defendants’ brief). Defendants contend that Plaintiff’s statements “opposing AMD’s IPR petitions provide a clear disclaimer of any understanding of the term ‘microprogram’ that does not incorporate these three characteristics.” Id. Defendants contend that Plaintiff’s proposed construction of plain-and-ordinary meaning is inappropriate given Plaintiff’s alleged IPR disclaimer. Id. at 14. Defendants contend because

“microprogram” is a technical term, the Court should construe it for the jury. Id. (citing Sulzer Textil A.G. v. Picanol N.V., 358 F.3d 1356, 1366 (Fed. Cir. 2004)). In its response, Plaintiff contends that Defendants’ proposed construction replaces a straightforward term with a “convoluted and unwarranted 50-word muddle.” Response at 7. Plaintiff contends that Claim 1 requires that “the CPU executes a ‘microprogram’ to perform functions in the CPU (related to power shutdown and restoration) as distinct from a more general ‘program’ run by the CPU for which the claimed invention seeks to preserve the information ‘necessary in proceeding with the program.’” Id. at 8. Plaintiff contends that the specification explains that “a microprogram relates to control functions of the CPU as distinct from more general programs run by the CPU.” Id. (citing ’575 Patent at 9:46–49). Plaintiff contends that the explanation in the specification tracks the plain- and-ordinary meaning of this term and does not otherwise define it. Id. Plaintiff contends that Defendants’ proposed construction improperly attempts to add “(a)

all description from Embodiment 1; (b) the term ‘microcode’; (c) require that it ‘runs at the lowest level of the hardware’; and (d) that it ‘is held entirely within the CPU as opposed to a program that is held in main memory until executed.’” Id. at 9. Plaintiff contends that elements (b) to (d) are from “third-party dictionaries cited as examples of what a microprogram is as distinct from what the petitioner had identified in the IPRs.” Id. (citing Opening, Ex. 6 at 54–55, Ex. 7 at 28). Plaintiff contends that while Defendants “assert[] the citation and discussion of these dictionaries constitute a disclaimer[,]” the Court must “analyze whether statements [] made during the prosecution of the asserted patents amount to a clear and unmistakable disclaimer limiting the meaning of the claim terms.” Id. at 10 (citing Mass. Inst. of Tech. v. Shire Pharms., Inc., 839 F.3d 1111, 1119 (Fed. Cir.

2016)). Plaintiff contends that none of the arguments it made during the IPRs “were premised on a microprogram being ‘a microcode’, ‘run at the lowest level of the hardware’; or ‘held entirely within the CPU.’” Id. Plaintiff contends that, in the first IPR, it argued that “Petitioner does not argue that a ‘microprogram’ for restoring power supply is taught in the asserted references[.]” Id. at 10–11 (citing Opening, Ex. 6 at 54). Plaintiff contends that it then “listed off the various third- party dictionary definitions articulating a distinction between ‘microprogram’ and ‘program,’” because the Petition “failed to argue that the reference taught a ‘microprogram[.]’” Id. Plaintiff contends that, in the second IPR, the “register-saving program” in the prior art reference was part of the “monitor program” that “runs in the environment of the operating system to detect when an inactive condition exists at the CPU.” Id. at 11 (citing Opening, Ex. 7 at 29) (emphasis in Plaintiff’s brief). Plaintiff contends that it “distinguished the asserted ‘register-saving program’ from a microprogram because it ran in the environment of the operating system and not

because it did not run ‘at the lowest level of hardware’ or was not held ‘entirely within the CPU as opposed to . . . main memory.’” Id. Plaintiff contends that this “distinction is consistent with the distinction from the specification between a program and a microprogram for controlling internal sources of the CPU.” Id. (citing ECF No. 33-1 at ¶ 43). Plaintiff contends that Defendants’ proposed construction is directly at odds with the specification insofar as it purports to construe a ‘microprogram’ as a program ‘that runs at the lowest level of the hardware.’” Id. (citing ECF No. 33-1 at ¶ 44). More specifically, Plaintiff contends that the specification describes using a “microprogram for jumping to a specific address,” and which “jumping to a specific address” is “typically part of the assembly language of a

microcontroller and is necessarily not the ‘lowest level.’” Id. (citing ’575 Patent at 12:26–29; ECF No. 33-1 at ¶¶ 44–47). Plaintiff contends that the dictionary definitions that Defendants seek to incorporate into the construction of “microprogram” are inconsistent with the specification. Id. at 12. For example, Plaintiff contends that one dictionary definition implies that “microprogram” is at a lower level than machine level instructions, but as described above in connection with “jumping to a specific address,” “microprogram” can be implemented at the level of assembly language. Id. (citing Opening, Ex. 10 at 693, ECF No. 33-1 at ¶¶ 44–47). Plaintiff contends that another dictionary definition describes that a “microprogram” is “frequently” stored in read-only memory, which undermines the requirement in Defendants’ proposed construction that the microprogram must always be “held entirely within the CPU.” Id. (citing Opening, Ex. 12 at 472). Plaintiff contends that “[n]o one element of these third-party definitions should be incorporated into the readily understood meaning of ‘microprogram’ within the context of the ’575 patent” and Defendants “cannot pick and choose which random elements to include.” Id.

In its reply, Defendants contend that rather than relying on the plain-and-ordinary meaning or use the definition provided in the specification, Plaintiff cited several technical dictionaries and narrowed the meaning of “microprogram” so it “[i] runs at the lowest level of hardware, [ii] is housed entirely within the CPU, and [iii] unlike the claimed general ‘program,’ is not held in the main memory of the computer system until executed by the CPU.” Id. 4–5 (citing Opening, Ex. 6 at 54–55, Ex. 7 at 28). Defendants contend that Plaintiff then used this new definition to distinguish the prior art. Id. at 5. Defendants contend that, during an IPR, Plaintiff “enumerated characteristics of the claimed ‘microprogram’ before explaining how the ‘register-saving program’ of Chung was not

the claimed microprogram.” Id. at 6 (emphasis in Defendants’ brief). Defendants contend that “even presuming that these characteristics were not ‘essential’ to [Plaintiff’s] argument, “the scope of surrender is not limited to what is absolutely necessary to avoid a prior art reference; patentees may surrender more than necessary.” Id. With respect to Plaintiff’s argument regarding “jumping to a specific address,” Defendants contend that Plaintiff’s argument is untimely because it knew about this functionality when “it expressly represented to the PTAB that a ‘microprogram is a special program that runs at the lowest level of the hardware.’” Id. at 6 (quoting Opening, Ex. 6 at 54) (emphasis in Defendants’ brief). Defendants further contend that the specification “does not mention that the jump functionality is performed by the ‘assembly language of the microcontroller.’” Id. Defendants contend that Plaintiff also “does not proffer any evidence that a microprogram cannot implement the ‘jump’ and only the assembly language of the microcontroller can jump.” Id. With respect to Plaintiff’s argument that the some dictionary definitions are inconsistent with the specification, Defendants contend that Plaintiff “cannot make such objections as it chose

to make these dictionaries part of the intrinsic record.” Id. at 7. In its sur-reply, Plaintiff contends that it “asserted in AMD IPR I that no microprogram had been identified at all and in AMD IPR II that the identified program was not a microprogram but a program ‘that runs in the environment of the operating system.’” Id. at 3 (citing Response at 10–11). Plaintiff contends that none of the limitations Defendants “seeks to import into the construction of ‘microprogram’ were the basis for the distinctions over the prior art.” Id. at 4 (citing Response at 10–11). Plaintiff contends that while it included a listing of the dictionary definitions, Defendants “arguments (without citation) that the ‘characteristics’ provided in these various dictionaries ‘were

central to [Plaintiff’s] argument’ in the IPRs do not hold up to scrutiny.” Id. (citing Reply at 6; Opening, Ex. 6 at 54, Ex. 7 at 29).

The Court’s Analysis: After reviewing the parties’ arguments and considering the applicable law, the Court concludes that the patentee acted as their own lexicographer and also made a partial disclaimer during the IPR. Lexicography: “To act as its own lexicographer, a patentee must [1] clearly set forth a definition of the disputed claim term other than its plain and ordinary meaning” and must [2] “clearly express an intent to redefine the term.” Hill-Rom Servs., Inc. v. Stryker Corp., 755 F.3d 1367, 1371 (Fed. Cir. 2014) (annotations added). Here, the patentee acted as their own lexicographer when they wrote that “[t]he microprogram herein refers to the control program for controlling internal sources of the CPU 1 in order to execute command, interrupt processing, and the like.” ’575 Patent at 9:46–49. More specifically, with respect to the first element, the Court

concludes that “the control program for controlling internal sources of the CPU 1 in order to execute command, interrupt processing, and the like” is a clear recitation of the definition of “microprogram.” With respect to the second element, the Court concludes that the phrase “herein refers to” indicates that the patentee intended to redefine the term. The Court disagrees with Plaintiff that this passage was only intended to be an “explicitly explanatory of the plain and ordinary meaning” and “does not define the term” as Plaintiff’s argument simply ignores the importance of the words “herein refers to.” By contrast, had the patentee only intended for this passage to provide an explanation of what the plain-and-ordinary meaning is, the patentee could have simply written this

passage as “The microprogram controls internal sources of the CPU 1 in order to execute command …” or “In some implementations, the microprogram is a control program for controlling internal sources of the CPU 1 in order to execute command...” Rather, the patentee chose to use the words “herein refers to.” As such, the Court concludes that the patentee had the clear intent to act as their own lexicographer. While this passage appearance in the description of the First Embodiment, the Court still concludes that this is lexicography for all embodiments for at least two reasons. First, the specification does not appear to provide a contrary definition or use the term in a manner with this definition, nor does Plaintiff appear to provide evidence of a contrary definition or usage. Second, the fact that the block diagrams for all embodiments label the CPU as “CPU 1” further indicates that the definition applies to all embodiments, and not just the First Embodiment. Id. at Figures 1, 6, 8, 9, 10, 13, 14, 19, 23. Disclaimer: “[F]or prosecution disclaimer to attach, our precedent requires that the alleged disavowing actions or statements made during prosecution be both clear and unmistakable.”

Omega Eng’g, 334 F.3d at 1325–26. Defendants contend that that the patentee added three characteristics to the meaning of “microprogram” to further narrow its meaning, namely: (1) “run[] at the lowest level of the hardware” and (2) be “held entirely within the CPU,” as opposed to (3) being a program “held in the main memory of the computer system until executed by the CPU.” With respect to the first characteristic, the Court conclude that the patentee’s prosecution statements meets the clear and unmistakable standard for a prosecution disclaimer. In particular, the patentee clearly and unambiguously described what they believed that a microprogram is, namely, “a special program that runs at the lowest level of the hardware.” Opening, Ex. 6 at 54, Ex. 7 at 28. By contrast, had the patentee not intended for these sentences to be prosecution

disclaimer, they could have written these sentences to recite “A microprogram may be a special program that runs at the lowest level of the hardware” or “A microprogram is a special program that may run at the lowest level of the hardware.” Plaintiff’s primary counter-argument against disclaimer is that a microprogram may be used to jump to specific address, which is typically implemented in assembly language and is not necessarily the lowest level of hardware. The Court’s concludes that Plaintiff’s argument is based on purported distinctions that are not actually technical differences. Whether or not microprograms are typically implemented in assembly language does not differentiate microprograms from other types of software because all software is compiled into assembly language and then machine language. Furthermore, with respect to running software, there are not different levels of hardware. Rather, there is only one level of hardware that software—regardless of how it is written (e.g., high-level programming language, assembly language, etc.)—runs on. At most, hardware may be

viewed as different levels of abstraction (e.g., chip-level, component level, gate-level, transistor level, semiconductor level, etc.), but when software “runs” on hardware, there is only a single level. That said, “lowest level” may not be surplusage as a POSITA might understand that software running on hardware is simply different electrical signals changing value, which is the “lowest” level. Therefore, for at least these reasons, the Court concludes that the patentee’s statement that “A microprogram is a special program that runs at the lowest level of the hardware” is a disclaimer. Opening, Ex. 6 at 54, Ex. 7 at 28. With respect to the second characteristic (whether the microprogram is held entirely within

the CPU), the Court concludes that the prosecution statements were not a clear and unmistakable disclaimer of claim scope. In particular, Defendants allege that “[t]he microcode is held entirely within the CPU” limits the scope of “microprogram” to be held entirely within the CPU. See, e.g., Opening at 11–12. But the alleged disclaimer is directed towards “microcode” and not “microprogram.” The fact that an alleged disclaimer uses an entirely different word (“microcode”) than the claim term (“microprogram”) indicates that this alleged disclaimer does not show the required “reasonable clarity and deliberateness” and is not “so unmistakable as to be unambiguous evidence of disclaimer.” Genuine Enabling, 29 F.4th 1365, 1374 (Fed. Cir. 2022). Defendants’ argument assumes that “microcode” is synonymous with “microprogram.” See, e.g., Opening at 10 (Plaintiff “further distinguished the term from a mere ‘program’ by explaining that the claimed ‘microprogram,” or microcode, ‘is held entirely within the CPU.’”). But the patentee described that the two are alternatives and not synonymous. Opening, Ex. 6 at 54 (“[i]n many CPUs, these individual instructions are performed by executing a microprogram or

microcode comprised of microinstructions.”). While Defendants’ expert opines that the two are synonymous, his opinion does not support that conclusion for at least two reasons. First, Defendants’ expert opines that a POSITA would “understand that ‘code’ and ‘program’ are sometimes used interchangeably.” Opening, Ex. 1 at ¶ 51. But this sentence only describes that “code” and “program” are “sometimes used interchangeably.” (Emphasis added). There is no evidence that this is one of those times. Second, this sentence only says that “code” and “program” may be used interchangeably, and not that “microcode” and “microprogram” may be used interchangeably. Therefore, for at least these reasons, the Court concludes that the patentee did not make a

disclaimer that a microprogram is held entirely within the CPU. With respect to the third characteristic (that the “microprogram” is held in the main memory of the computer system until executed by the CPU), the Court concludes that the prosecution statements were not a clear and unmistakable disclaimer of claim scope. In particular, Defendants allege that the patentee contrasted programs with microprograms such that because the former is held in main memory, the latter must not be held in main memory, but rather is held in the CPU. But Defendants’ argument is incorrect for at least the following reasons. First, there is no requirement that every characteristic of a microprogram must differ than the corresponding characteristic of a program. As such, absent a specific disclosure, just because a program may be stored in main memory does not necessarily require that the microprogram cannot also be stored in main memory. Second, even if main memory does not store a microprogram, that does not necessarily require that the microprogram must be stored in the CPU. Rather, the microprogram could be stored in a memory component that is not the main memory, e.g., read-only memory. In fact, one

of the dictionary definitions that Defendants cite describes that a microprograms are “[f]requently…stored in a read-only memory.” Opening, Ex. 12 at 472. Therefore, for at least these reasons, the Court concludes that the patentee did not make a disclaimer that a microprogram is held entirely within the CPU, and not in the main memory of the computer system. In conclusion, based on the above analysis, the Court finds that “microprogram” should be construed as “a control program for controlling internal sources of the CPU in order to execute command, interrupt processing, and the like, that runs at the lowest level of hardware.” C. Term #3: “power shutdown microprogram” D. Term #4: “power supply restoration microprogram”

Term Plaintiff’s Proposed Defendants’ Proposed Construction Construction #3: “power shutdown Plain and ordinary meaning “a microprogram that microprogram” evacuates the information necessary in proceeding with U.S. Patent No. 7,930,575, the program to the Claim 1 information holding unit, and then outputs the evacuation Proposed by Defendants completed signal to the power supply control unit”

#4: “power supply restoration Plain and ordinary meaning “a microprogram that restores microprogram” the information necessary in proceeding with the program U.S. Patent No. 7,930,575, and evacuated in the Claim 1 information holding unit to the CPU, and then branches Proposed by Defendants the processes to the addresses indicated by the program counter to continue the program execution from the shutdown state”

The Parties’ Positions: Defendants contend that the language of Claim 1 confirms Defendants’ proposed construction for both terms. Opening at 15, 16. More specifically, Defendants contend that execution of the (1) “power shutdown microprogram” or (2) “power restoration microprogram” causes the CPU to (1) “evacuate[] the information necessary in proceeding with the program to the information holding unit” and “output[] an evacuation completed signal to the power supply control unit after evacuation is completed” and (2) “restore[] the information necessary in proceeding with the program and evacuated in the information holding unit in time of power shutdown” and then “branch[] a process to an address indicated by a program counter to continue program execution from a shutdown state,” respectively. Id. at 15, 17. Defendants contend that the specification confirms this understanding. Id. at 15, 17. With respect to “power shutdown microprogram,” Defendants contend that the specification recites that “[t]he power shutdown microprogram evacuates the information necessary in proceeding with the program to the information holding unit, and then outputs the evacuation completed signal to the power supply control unit.” Id. at 15 (quoting ’575 Patent at 2:62–65). With respect to “power

supply restoration microprogram,” Defendants contend that the specification recites that “[t]he power supply restoration microprogram restores the information necessary in proceeding with the program and evacuated in the information holding unit to the CPU, and then branches the processes to the addresses indicated by the program counter to continue the program execution from the shutdown state.” Id. at 17 (quoting ’575 Patent at 4:1–6). Defendants contend that both of these statements appear within a passage that describes “the features of ‘the present invention’ as a whole.” Id. at 15, 17. Defendants contend that Embodiment 1 supports its proposed construction. Id. at 15. More specifically, with respect to “power shutdown microprogram,” Defendants contend that the

specification, in reference to Figure 1, describes “[t]he power shutdown microprogram μP1 evacuates the information (PC, PSW, SP, etc.) necessary in proceeding with the program to the information holding unit 4 or the register via the internal bus 6 in step n3, and lastly outputs the evacuation completed signal S2 to the power supply control unit 2.” Id. at 16. Similarly, Defendants contend that “exemplary embodiment 1 confirms [Defendants’] construction for ‘power supply restoration microprogram.’” Id. at 17. In its response, Plaintiff contends that “[t]he claim as drafted requires that the CPU executes a microprogram (either related to power shutdown or restoration as appropriate), and then the CPU performs the functions of evacuating or restoring information and subsequent actions.” Response at 14 (emphasis in Plaintiff’s brief). Plaintiff contends that “even if [Defendants] were correct to assert that the claim requires that the claimed microprograms ‘cause[]’ the CPU to perform the claimed functions, it is still the CPU that executes the instructions of the microprogram as claimed.” Id. (citing ECF No. 33-1 at

¶¶ 52, 56). Plaintiff contends that it is generally improper to limit claims to an embodiment. Id. Plaintiff contends that the “specification, like the claims, do not require that the microprogram necessarily include the instructions to carry out each of the claimed functions.” Id. (citing ’575 Patent at 12:21–31). In its reply, Defendants contend that the “Summary of the Invention” section of the patent provided definitions for these two terms. Reply at 7. Defendants contend that “[s]uch definitions, when a part of ‘the present invention,’ are limiting.” Id. (citing Verizon Servs. Corp. v. Vonage Holdings Corp., 503 F.3d 1295, 1308 (Fed. Cir. 2007)). Defendants contend that the specification

“consistently describes that the CPU executes the ‘power shutdown microprogram’ to evacuate information and that the CPU executes the ‘power supply restoration microprogram’ to restore information to the CPU.” Id. at 8 (citing ’575 Patent at “Summary of the Invention”). Plaintiff argued, with respect to “microprogram,” that “microprograms” are “held entirely within the CPU,” which Defendants contend “necessarily requires that the described functions will be ultimately carried out by the CPU.” Id. at 8. Defendants contend that Plaintiff disavowed the use of a “program” to save and restore information. Id. More specifically, during an IPR, Defendants contend that “[t]here is no indication in Chung that the register-saving program is a microprogram[.]” Id. (citing Opening, Ex. 7 at 27–29). With respect to Plaintiff’s argument that Defendants improperly attempt to limit the claim term to an embodiment, Defendants contend that their proposed constructions “find support in the definitions from the Summary of the Invention, and in particular definitions of the ‘present

invention.’” Id. In its sur-reply, Plaintiff contends that the claims define the scope of the invention and “the claims require the CPU to perform the limitations that [Defendants] seek[] to incorporate into the claimed microprograms.” Sur-Reply at 4–5 (citing Vitronics Corp. v. Conceptronic, 90 F.3d 1576, 1582 (Fed. Cir. 1996)). With respect to Defendants’ “present invention” argument, Plaintiff contends that the “Summary of the Invention” section includes 17 various embodiments of the invention “and would not be viewed as a definition of the invention by one of ordinary skill.” Id. at 5. Plaintiff contends that “[s]uch an extensive listing of optional features and aspects of the invention that correspond

to different claims does not rise to the level of a disclaimer requiring that they be read into the claims.” Id. at 6 (citing Pacing Techs., LLC v. Garmin Int’l, Inc., 778 F.3d 1021, 1025 (Fed. Cir. 2015)).

The Court’s Analysis: After reviewing the parties’ arguments and considering the applicable law, the Court agrees with Plaintiff that this term should be construed according to its plain-and-ordinary meaning for the reasons that follow. First, the “heavy presumption” is that terms should be construed according to their plain-and-ordinary meaning. Azure Networks, 771 F.3d at 1347. Second, Defendants do not expressly allege lexicography or disclaimer, which are the only two exceptions to the general rule that a term should be construed as having its plain-and-ordinary meaning. Thorner, 669 F.3d at 1365. Third, Defendants’ proposed construction improperly rewrites the claims. Generation II Orthotics Inc. v. Med. Tech. Inc., 263 F.3d 1356, 1365 (Fed. Cir. 2001) (a claim construction must

not “revise or ignore the explicit language of the claims.”). More specifically, Claim 1 recites that the CPU—and not the power shutdown microprogram as Defendants’ proposed construction requires—“evacuates the information necessary in proceeding with the program to the information holding unit, and outputs an evacuation completed signal to the power supply control unit after evacuation is completed[.]” ’575 Patent, Claim 1, Limitation [g]. Similarly, Claim 1 recites that the CPU—and not the power supply restoration microprogram as Defendants’ proposed construction requires—“restores the information necessary in proceeding with the program and evacuated in the information holding unit in time of power shutdown, and then branches a process to an address indicated by a program counter to continue program execution from a shutdown

state.” ’575 Patent, Claim 1, Limitation [o]. Fourth, Defendants’ proposed construction improperly excludes some embodiments. Oatey Co. v. IPS Corp., 514 F.3d 1271, 1276 (Fed. Cir. 2008) (“We normally do not interpret claim terms in a way that excludes embodiments disclosed in the specification. . . . where claims can reasonably be interpreted to include a specific embodiment, it is incorrect to construe the claims to exclude that embodiment, absent probative evidence to the contrary.”). More specifically, with respect to “power shutdown microprogram,” the specification describes embodiments where “the CPU, upon receiving the shutdown request signal, activates a power shutdown microprogram, evacuates the information necessary in proceeding with the program to the information holding unit, and outputs an evacuation completed signal to the power supply control unit after evacuation is completed[.]” See, e.g. ’575 Patent at 2:46–51, 4:24–29. With respect to “power supply restoration microprogram,” the specification describes an embodiment where [T]he CPU, upon receiving the restoration request signal, activates a power supply restoration microprogram, restores the information necessary in proceeding with the program and evacuated in the information holding unit in time of power shutdown, and ultimately branches processes to addresses indicated by a program counter to change from a shutdown state to a program execution state and proceed with the program.

Id. at 3:48–55. Defendants’ proposed construction improperly excludes these embodiments by requiring that the claimed microprograms perform these actions instead of allowing for the CPU to perform these actions. Fifth, Defendants’ proposed construction limits both claim terms to some of the disclosed embodiments. For “power shutdown microprogram,” Defendants’ proposed construction is only based on one embodiment, which can be found at 2:62–65. But the specification discloses other embodiments that disclose other aspects of the power shutdown microprogram. See, e.g., ’575 Patent at 3:29–35 (describing that the power shutdown microprogram stops operation of the clock generator), 5:1–6 (describing that the power shutdown microprogram evacuates the information necessary to a stack region). Similarly, the specification discloses other embodiments that disclose other aspects of the power supply restoration microprogram. See, e.g., ’575 Patent at 5:29–35 (describing that the power supply restoration microprogram “includes: a microprogram for restoring the evacuated information necessary in proceeding with the program; a microprogram for restoring a set value without using the evacuated information necessary in proceeding with the program; and a program for resetting processes”). Sixth, the Court agrees with Plaintiff that because the specification describes seventeen different embodiments of the present invention, the Court concludes that such a “long list of different ‘objects of the present invention’ that correspond to features positively recited in one or more claims, [indicates that] it seems unlikely that the inventor intended for each claim to be limited to all of the many objects of the invention.” Pacing Techs., 778 F.3d at 1025.

Therefore, for the reasons described above, the Court finds that the term should be construed according to its plain-and-ordinary meaning. E. Term #5: “The microcontroller according to claim 1, wherein the clock generator selects one of operation performed after stopping supply of an operation clock and operation stop performed without stopping the supply of the operation clock as operation to be performed upon receiving the clock stop control signal from the power supply control unit.”

Term Plaintiff’s Proposed Defendants’ Proposed Construction Construction #5: “The microcontroller Plain and ordinary meaning Indefinite according to claim 1, wherein the clock generator selects one of operation performed after stopping supply of an operation clock and operation stop performed without stopping the supply of the operation clock as operation to be performed upon receiving the clock stop control signal from the power supply control unit.”

U.S. Patent No. 7,930,575, Claim 2

Proposed by Defendants The Parties’ Positions: The parties agree that “the language of claim 2 provides two options upon receiving the clock stop control signal: “[i] operation performed after stopping supply of an operation clock,” and “[ii] operation stop performed without stopping the supply of the operation clock.” Reply at 9; see also Response at 15.

Defendants contend that, with respect to the first option, it “is unclear as to what ‘operation’ is ‘performed’ after stopping supply of the clock[,]” and that the specification does not provide any guidance. Id. Defendants contend that the second option “requires an ‘operation stop’ without stopping supply to the operation clock.” Id. (emphasis in Defendants’ brief). Defendants contend that it is “not clear at all what “operation stop” means in this context when the claim requires simultaneously to perform ‘operation stop’ while not stopping the supply of the clock[,]” and that the specification again does not provide any guidance. Id. (emphasis in Defendants’ brief). In its response, Plaintiff contends that “[t]he clock generator is one of the structures claimed as part of the microcontroller of claim 1 and it receives ‘a clock stop control signal’ from the power

supply control unit[,]” while “language of claim 2 describes one of the ‘[v]ariants’ of Embodiment 1 in the specification where the clock generator is configured to select between either stopping the clock or not.” Response at 15–16. Plaintiff contends that “the invention of claim 2 allows the shutdown of the CPU as required by claim 1 with the capability of choosing whether or not to also shut down the clock.” Id. at 16. Based on that, Plaintiff contends that Claim 2 is not indefinite. Id. In its reply, Defendants contend that “the central ambiguity in the language of the claim: How can the clock generator perform the ‘operation stop’ without stopping the clock?” Reply at 9. Defendants contend that Plaintiff cannot answer this question because the specification is silent on this point. Id. In its sur-reply, Plaintiff contends that [C]laim 1 requires that the CPU stops operating, but it does not require that the clock generator necessarily stops, only that it receives the signal. Claim 2 adds the limitation that the microcontroller of claim 1 can be configured for the clock generator to “select” between the “operation” of claim 1 which stops the CPU (as required by claim 1) either “after stopping supply of an operation clock” or “without stopping the supply of the operation clock. The specification describes this when it describes that “[t]he clock generator 3 may be configured to select a mode of stopping the supply of the operation clock or a mode of not stopping the supply of the operation clock based on the setting in the register, signal, terminal, or the like.”

Sur-Reply at 7 (quoting ’575 Patent at 11:3–14).

The Court’s Analysis: After reviewing the parties’ arguments and considering the applicable law, the Court agrees with Defendants that the term is indefinite. In particular, the Court agrees with Defendants that the claim language is indefinite because it is unclear how the clock generator can perform the “operation stop” without stopping the supply of the operation clock. The specification describes that “[t]he clock generator 3 supplies or stops an operation clock in response to a clock supply/clock stop control signal S3 from the power supply unit 2.” ’575 Patent at 8:52–54; see also ’575 Patent at 9:16–19, 10:15–16, 16:60–62. But the specification does not describe that the clock generator performs the “operation stop” without stopping the supply of the operation clock. The specification only uses the words “operation stop” once, and even then only to mimic the claim language. Id. at 4:52–55. As such, there is no guidance what “operation stop” entails, let alone how a clock generator can perform that operation without stopping the supply of the operation clock. As described above, Plaintiffs contend that the clock generator in Claim 2 either (1) stops the CPU after stopping supply of an operation clock or (2) stops the CPU without stopping the supply of the operation clock. Sur-Reply at 7. But Plaintiff’s argument does not save the claim term from indefiniteness for at least the following reasons. First, the language of Claim 2 does not describe that the clock generator stops the CPU without stopping the supply of the operation

clock. Rather, the relevant portion of Claim 2 recites that “the clock generator selects … operation stop performed without stopping the supply of the operation clock as operation[.]” Second, the passage that Plaintiff cites (11:3–14) does not mention a CPU, so that passage does not support the claim interpretation that the ambiguous claim language should be interpreted as the clock generator stops the CPU without stopping the supply of the operation clock. Therefore, for the reasons described above, the Court concludes that Defendants have provided clear and convincing evidence that this term is indefinite. F. Term #6: “The microcontroller according to claim 1, wherein one of the power shutdown microprogram and the power supply restoration microprogram is selectively executed in an alternative way, according to the generated power shutdown factor or a type of the selected power shutdown factor.”

Term Plaintiff’s Proposed Defendants’ Proposed Construction Construction #6: “The microcontroller Plain and ordinary meaning Indefinite according to claim 1, wherein one of the power shutdown microprogram and the power supply restoration microprogram is selectively executed in an alternative way, according to the generated power shutdown factor or a type of the selected power shutdown factor.”

U.S. Patent No. 7,930,575, Claim 8

Proposed by Defendants

The Parties’ Positions: Defendants contend that Claim 8 is indefinite because a POSITA “would be unable to understand how the two microprograms recited in the claim are to be ‘selectively executed in an alternative way’ based on two power shutdown factors, even after consulting the specification.” Id. (citing Nautilus, 572 U.S. at 901). More specifically, Defendants contend that “selectively executed in an alternative way” “seems to imply selection of one of two microprograms based on ‘the generated power shutdown factor or a type of power shutdown factor.’” Id. (emphasis in Defendants’ brief). Defendants contend that the specification “does not describe how the power shutdown factor results in the selective execution of the power supply restoration microprogram in an alternate way[,]” but rather “it largely parrots the claim but in the context of the second embodiment … and mentions only selectively activated.” Id. (citing ’575 Patent at 12:32–36) (emphasis in Defendants’ brief). Defendants further contend that “the generated power shutdown factor” and “the selected power shutdown factor” both lack an antecedent basis, thus “compound[ing] the ambiguity.” Id. Defendants contend that while Claim 1 recites a “power shutdown factor,” that factor is not

described as either “generated” or “selected.” Id. Defendants finally contend that “Claim 8 presents two intractable alternatives.” Id. More specifically, Defendants contend that Claim 8 could require “selectively executing” one of the two recited microprograms. If that is correct, then the patent does not explain how the selected microprogram is to be executed in an “alternative way.” But, “alternative way” could imply alternating execution between the two microprograms. If that is correct, then the patent does not clarify what “selectively executing” requires.

Id. at 19–20. Defendants contend that the specification does not provide guidance as to the meaning of “selectively executed.” Id. at 20. In its response, Plaintiff contends that “Claim 1 requires ‘a power shutdown factor’ the occurrence of which prompts the power supply control unit to output a shutdown request signal and in turn leads to the execution of the power shutdown microprogram and power supply restoration microprogram in accordance with the other limitations of the claim.” Response at 16– 17. Plaintiff contends that Claim 8 captures an embodiment in the specification where the claimed “power shutdown factor” provides more nuanced indication (i.e. “according to the generated power shutdown factor or a type of the selected power shutdown factor”) such that one or both of the microprograms is “selectively executed in an alternative way” to permit changes in the information necessary to be evacuated or restored as required by claim 1.

Id. at 17. In its reply, Defendants contend that Plaintiff’s “attempt to explain claim 8 is circular—it fails to clarify how the power shutdown factor results in the selective execution of the power supply restoration microprogram in an alternative way.” Reply at 9. Defendants contend that Plaintiff cannot explain Claim 8 because the specification is silent, apart from “parrot[ing]” the claim language. Id.

Defendants contend that the language of Claim 8 is similar to the language of Claim 7: the CPU selects one of the plurality of microprograms in an alternative way, which the Court previously held to be indefinite. Id. at 10. Defendants contend that Plaintiff “fails to acknowledge the antecedent basis issue concerning ‘generated’ and ‘selected’ power shutdown factors.” Id. Defendants further contend that “the power shutdown factor in claim 1 cannot be simultaneously both the ‘generated’ and ‘selected’ power shutdown factors in claim 8.” Id. In its sur-reply, Plaintiff contends that Claim 8 captures an embodiment in the specification where the claimed “power shutdown factor” of claim 1 provides more nuanced indication (i.e. “according to the generated power shutdown factor or a type of the selected power shutdown factor”) such that one or both of the microprograms is “selectively executed in an alternative way” to permit changes in the information necessary to be evacuated or restored as required by claim 1.

Sur-Reply at 7. With respect to Defendants’ argument regarding the lack of antecedent basis for “generated” or “a type of the selected,” Plaintiff contends that “there is an antecedent basis for which signal is being referenced” and “claim 8 requires that aspects of the ‘power shutdown factor’ either in how it was ‘generated’ or ‘a type of the selected’ ‘power shutdown factor’ control the way in which one of the microprograms is executed.” Id. at 7–8. The Court’s Analysis: After reviewing the parties’ arguments and considering the applicable law, the Court agrees with Defendants that the term is indefinite. First, the language requires that “one of the power shutdown microprogram and the power supply restoration microprogram is selectively executed in an alternative way[.]” The Court concludes that a POSITA would not understand, with at least

reasonable certainty, what “selectively execute in an alternative way” means. Nautilus, 572 U.S. at 910. More specifically, “selectively executing” appears to describe that one of the two recited microprograms—the power shutdown microprogram and the power supply restoration microprogram—is selected for execution. Assuming that is true, then the meaning and scope of “in an alternative way” is unclear. One possibility is that “in an alternative way” could be that each microprogram is an alternative to the other. But, under that interpretation, it is unclear how that language further limits the meaning of “selectively executed.” On the other hand “in an alternative way” could mean that the two microprograms are executed in an alternating manner. But in this case, it is not clear what “selectively executing” means. Based on this, the Court

concludes that because a POSITA would not understand, with at least reasonable certainty, what “selectively execute in an alternative way” means, the claim term is indefinite. Id. Second, given that there are two power shutdown factors—one that is generated and one that is selected—and given that Claim 1 only recites a single power shutdown factor in Limitation [f], there is a lack of antecedent basis for either (1) the generated power shutdown factor or (2) the selected power shutdown factor. Furthermore, the fact that both “the generated power shutdown factor” and “the selected power shutdown factor” lack an antecedent basis further compounds the above ambiguity. Therefore, for the reasons described above, the Court concludes that Defendants have provided clear and convincing evidence that this term is indefinite. G. Term #7: “power supply unit”

Term Plaintiff’s Proposed Defendants’ Proposed Construction Construction #7: “power supply unit” Plain and ordinary meaning Plain and ordinary meaning [neither requiring nor U.S. Patent No. 7,930,575, excluding the power switch] Claim 1

Proposed by Plaintiff

The Parties’ Positions: Defendants contend that the specification does not describe that the claimed “power supply unit” requires a power switch. Opening at 20. Defendants contend that Plaintiff’s proposed construction “inject[s] additional meaning into the claim limitation to include a ‘power switch’ without intrinsic support[,]” and will confuse a jury. Id. In its response, Plaintiff contends that the purpose of its proposed negative parenthetical is in response to a prior claim construction where the Court construed this term to mean “Not subject to 35 U.S.C. § 112, para. 6; plain and ordinary meaning, wherein the power switch is not a part of the power supply unit.” Response at 17 (citing Opening, Ex. 5 at 5) (emphasis in Plaintiff’s brief). Plaintiff contends that “nothing in the specification or the plain and ordinary meaning of the term ‘power supply unit’ that the presence of a switch renders something not ‘a power supply unit.’” Id. at 18. Plaintiff further contends that “so long as [Defendants] agree[] that the claimed ‘power supply unit’ should be subject to its plain and ordinary meaning and cannot seek to leverage the AMD case order to make arguments regarding a ‘power supply unit’ including or not including a switch, then this term should be agreed as subject to its plain and ordinary meaning.” Id. In its reply, Defendants contend that while it understands the Court’s prior construction (“plain and ordinary meaning, wherein the power switch is not part of the power supply unit”), but that Plaintiff’s proposed construction (“neither requiring nor excluding the power switch”) is “meaningless as it does not inform the claim scope.” Id. Defendants contend that the specification and figures “do not disclose a power switch as part of (or required by) the power supply unit. In

fact, they disclose the opposite.” Id. In its sur-reply, Plaintiff contends that “[a] negative limitation, which was arguably suggested by the Court’s prior claim construction, requires either specific support in the claim language or ‘express disclaimer or independent lexicography in the written description that would justify adding that negative limitation.’” Sur-Reply at 8 (citing Omega Eng’g, 334 F.3d at 1322). Plaintiff contends that “[n]one of the required justifications for negative limitations are present here (or even argued by [Defendants]).” Id.

The Court’s Analysis:

After reviewing the parties’ arguments and considering the applicable law, the Court agrees with Defendants that that plain-and-ordinary meaning, without further clarification, is the correct construction. First, there does not appear to be any dispute between the that the term “power supply unit” is a well-known and well-understood term. As such, the Court concludes that further clarification is unnecessary. U.S. Surgical Corp. v. Ethicon, Inc., 103 F.3d 1554, 1568 (Fed. Cir. 1997) (claim construction is “not an obligatory exercise in redundancy”); C.R. Bard, 388 F.3d at 863 (“merely rephrasing or paraphrasing the plain language of a claim by substituting synonyms does not represent genuine claim construction”) (internal quotations marks omitted). Second, the Court concludes that a POSITA would understand that a power supply unit and power switch are separate components. As such, the Court agrees with Plaintiff that the plain- and-ordinary meaning of a power switch does not require or exclude the presence of a power switch. Therefore, for the reasons described above, the Court finds that the term should be construed according to its plain-and-ordinary meaning without further clarification. IV. CONCLUSION In conclusion, for the reasons described herein, the Court adopts the below constructions as its final constructions.

SIGNED this 7th day of October, 2025. am ( ALAN D ALB T UNITED STATES DISTRICT JUDGE

Case 6:24-cv-00472-ADA Document 51 Filed 10/07/25 Page 44 of 46

Term Plaintiff’s Proposed Defendants’ Proposed Court’s Final Construction Construction Construction #1: “microcontroller” Plain and ordinary meaning “a single integrated chip as Plain-and-ordinary meaning opposed to a set of multiple U.S. Patent No. 7,930,575, chips (a “chipset”)” Claim 1

#2: “microprogram” Plain and ordinary meaning “a control program (or a “a control program for microcode) that runs at the controlling internal sources of U.S. Patent No. 7,930,575, lowest level of the hardware to the CPU in order to execute Claim 1 control internal source of the command, interrupt CPU to execute command, processing, and the like, that Proposed by Defendants interrupt processing, and the runs at the lowest level of like, and is held entirely within hardware.” the CPU as opposed to a program that is held in main memory until executed”

#3: “power shutdown Plain and ordinary meaning “a microprogram that Plain and ordinary meaning microprogram” evacuates the information necessary in proceeding with U.S. Patent No. 7,930,575, the program to the information Claim 1 holding unit, and then outputs the evacuation completed Proposed by Defendants signal to the power supply control unit”

44 Case 6:24-cv-00472-ADA Document 51 Filed 10/07/25 Page 45 of 46

Term Plaintiff’s Proposed Defendants’ Proposed Court’s Final Construction Construction Construction #4: “power supply restoration Plain and ordinary meaning “a microprogram that restores Plain and ordinary meaning microprogram” the information necessary in proceeding with the program U.S. Patent No. 7,930,575, and evacuated in the Claim 1 information holding unit to the CPU, and then branches the Proposed by Defendants processes to the addresses indicated by the program counter to continue the program execution from the shutdown state”

#5: “The microcontroller Plain and ordinary meaning Indefinite Indefinite according to claim 1, wherein the clock generator selects one of operation performed after stopping supply of an operation clock and operation stop performed without stopping the supply of the operation clock as operation to be performed upon receiving the clock stop control signal from the power supply control unit.”

45 Case 6:24-cv-00472-ADA Document 51 Filed 10/07/25 Page 46 of 46

Term Plaintiff’s Proposed Defendants’ Proposed Court’s Final Construction Construction Construction #6: “The microcontroller Plain and ordinary meaning Indefinite Indefinite according to claim 1, wherein one of the power shutdown microprogram and the power supply restoration microprogram is selectively executed in an alternative way, according to the generated power shutdown factor or a type of the selected power shutdown factor.”

#7: “power supply unit” Plain and ordinary meaning Plain and ordinary meaning Plain-and-ordinary meaning [neither requiring nor U.S. Patent No. 7,930,575, excluding the power switch] Claim 1